rt9232a Richtek Technology Corporation, rt9232a Datasheet - Page 11

• Manufacturer Part Number: rt9232a
• Description: Programmable Frequency Synchronous Buck Controller
• Manufacturer: Richtek Technology Corporation

Generally, an inductor that limits the ripple current between
20% and 50% of output current is appropriate. Make sure
that the output inductor could handle the maximum output
current and would not saturate over the operation
temperature range.
Output Capacitor Selection
The output capacitors determine the output ripple voltage
(ΔV
load transient. The selection of output capacitor depends
on the output ripple requirement. The output ripple voltage
is described as Equation (6).
For electrolytic capacitor application, typically 90~95%
of the output voltage ripple is contributed by the ESR of
output capacitors. Paralleling lower ESR ceramic capacitor
with the bulk capacitors could dramatically reduce the
equivalent ESR and consequently the ripple voltage.
Input Capacitor Selection
Use mixed types of input bypass capacitors to control
the input voltage ripple and switching voltage spike across
the MOSFETs. The buck converter draws pulsewise
current from the input capacitor during the on time of upper
MOSFET. The RMS value of ripple current flowing through
the input capacitor is described as:
The input bulk capacitor must be cable of handling this
ripple current. Sometime, for higher efficiency the low ESR
capacitor is necessarily. Appropriate high frequency
ceramic capacitors physically near the MOSFETs
effectively reduce the switching voltage spikes.
MOSFET Selection
The selection of MOSFETs is based upon the
considerations of R
thermal management requirements. The power loss of
upper MOSFET consists of conduction loss and switching
loss and is expressed as:
DS9232A-02 March 2007
I
ΔI
ΔV
IN(RMS)
L
OUT
OUT
=
(V
) and the initial voltage drop after a high slew-rate
=
=
IN
I
ΔI
OUT
−
L
V
x
OUT
x
ESR
x )
D
DS(ON)
x
V
+
(1
IN
1
8
−
f x
V
, gate driving requirements, and
x
D)
OUT
OSC
f
OSC
2
x
L
x
V
L
OUT
x
C
OUT
(1
(5)
(7)
−
D)
(6)
where T
upper MOSFET respectively. R
simultaneously considered to minimize power loss of upper
MOSFET.
The power loss of lower MOSFET consists of conduction
loss, reverse recovery loss of body diode, and conduction
loss of body diode and is express as:
where T
Special control scheme is adopted to minimize body diode
conducting time. As a result, the R
the power loss of lower MOSFET. Use MOSFET with
adequate R
thermal requirements.
Feedback Compensation
Figure 4 highlights the voltage-mode control loop for a
synchronous buck converter. Figure 5 shows the
corresponding Bode plot. The output voltage (V
regulated to the reference voltage. The error amplifier EA
output (COMP) is compared with the oscillator (OSC)
sawtooth wave to provide a pulse-width modulated (PWM)
wave with an amplitude of V
PWM wave is smoothed by the output filter (L and C
The modulator transfer function is the small-signal transfer
function of V
DC gain and the output filter (L and C
pole break frequency at F
DC gain of the modulator is simply the input voltage (V
divided by the peak-to-peak oscillator voltage ΔV
The break frequency F
Equation (10) and (11) respectively.
P
P
F
F
=
=
+
P_LC
UPPER
LOWER
Z_ESR
I
I
1
2
OUT
OUT
I x
=
OUT
x
x
=
=
RISE
DIODE
=
2
R
R
π
P
2
P
DS(ON)
DS(ON)
x V
π
COND
COND
and T
DS(ON)
OUT
LC
x
is the conducting time of lower body diode.
1
F
ESR
x
OUT
_UPPER
/COMP. This function is dominated by a
_LOWER
x
x
T
FALL
1
D
(1
DIODE
to minimize power loss and satisfy
x
+
−
C
are rising and falling time of V
D)
1
2
+
OUT
I
LC
+
OUT
f x
P
+
P_LC
P
SW_UPPER
Q
OSC
RR
and F
IN
RR
x V
+
and a zero at F
at the PHASE node. The
DS(ON)
x V
P
IN
DIODE
ESR
x
DS(ON)
IN
RT9232A
(T
OUT
f x
and Q
are expressed as
RISE
OSC
www.richtek.com
), with a double
loss dominates
+
(10)
(8)
(9)
(11)
G
T
FALL
Z_ESR
should be
OSC
OUT
)
. The
f x
OUT
DS
.
) is
OSC
IN
11
of
).
)