ht82k75rew Holtek Semiconductor Inc., ht82k75rew Datasheet - Page 20

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ht82k75rew

Manufacturer Part Number
ht82k75rew
Description
Ht82m75rew/ht82k75rew 2.4ghz Transceiver 8-bit Otp Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
wake-up capability, the device can be woken up by any
I/O transition. For more details, refer to the Configura-
tion Option Section later.
I/O Port Control Registers
Each I/O port has its own control register known as PAC,
PBC, etc., to control the input/output configuration. With
this control register, each CMOS/NMOS output or input
with or without pull-high resistor structures can be re-
configured dynamically under software control. Each of
the I/O ports is directly mapped to a bit in its associated
port control register. PC and PB can be set CMOS or
NMOS output for option.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as a CMOS/NMOS output. If the pin is currently
setup as an output, instructions can still be used to read
the output register. However, it should be noted that the
program will in fact only read the status of the output
data latch and not the actual logic status of the output
pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
Rev. 1.00
Input/Output Ports
20
gram control.
I/O Pin Structures
The diagrams illustrate the I/O pin internal structures. As
the exact logical construction of the I/O pin may differ
from these drawings, they are supplied as a guide only
to assist with the functional understanding of the I/O
pins.
Programming Considerations
Within the user program, one of the first things to con-
sider is port initialisation. After a reset, all of the data and
port control register will be set high. This means that all
I/O pins will default to an input state, the level of which
depends on the other connected circuitry and whether
pull-high options have been selected. If the control reg-
isters, known as PAC, PBC, etc., are programmed to
setup some pins as outputs, these output pins will have
External Timer Clock Input
The external timer pin TMR is pin-shared with the I/O
pin PA2. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
External Interrupt Input
The external interrupt pin INT is pin-shared with the
I/O pin PC2. For applications not requiring an external
interrupt input, the pin-shared external interrupt pin
can be used as a normal I/O pin, however to do this,
the external interrupt enable bits in the INTC register
must be disabled.
HT82M75REW/HT82K75REW
June 11, 2010

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