ht82k75rew Holtek Semiconductor Inc., ht82k75rew Datasheet - Page 54

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ht82k75rew

Manufacturer Part Number
ht82k75rew
Description
Ht82m75rew/ht82k75rew 2.4ghz Transceiver 8-bit Otp Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
FIFOs serve as the temporary data buffers for data
transmission and reception. Each FIFO holds only one
packet at a time. TXFIFO, the transmission FIFO, is
composed of 62-byte FIFO. RX FIFO, the receiving
FIFO, is composed of two 64-byte FIFOs.
RF Transceiver Power Management
Block
Almost all wireless sensor network applications require
low-power consumption to lengthen battery life. Typical
battery-powered device is required to be operated over
years without replacing its battery. The RF Transceiver
achieves low active current consumption of both the dig-
ital and the RF/analog circuits by controlling the supply
voltage and using low-power architecture.
Rev. 1.00
TX FIFO - (62 bytes)
The TXMAC gets the to-be transmitted data from the
62-byte TXFIFO. The memory space of TXFIFO is
from 0x001 to 0x03E and contains a FL field, ad-
dress field, FC field and payload field. The FL field in-
dicates the length of the address field, FC field and the
payload field. The valid value of frame length is from 5
to 61 bytes.
RX FIFO - RXFIFO0 (64 bytes) and
RXFIFO1 (64 bytes)
A RXFIFO is composed of two 64-byte FIFOs
(RXFIFO0 and RXFIFO1) to store the incoming
packet. Each of them is designed to store one packet
at a time. RXFIFO contains a FL field, address field,
FC field, payload field and FCS field. The memory
space of RXFIFO is from 0x300 to 0x33F . The FL
field, which is extracted from the PHY header, indi-
cates the length of the address field, FC field, the pay-
load field and FCS field. The valid value of frame
length is from 7 to 63 bytes. The value of the FL field of
PHY header is calculated by adding 2, the length of
FCS field of MAC frame, and the above mentioned
value up.
RXFIFO Format
TXFIFO Format
54
The RF Transceiver has four power saving modes that
will be further described in Power Saving Modes Sec-
tion. For ultra low-power operation, Power-down mode
is available which consumes around 0.1 A while the RF
Transceiver is powered down. All data stored in regis-
ters and FIFOs will be lost under Power-down mode. In
this mode, The RF Transceiver is able to wake up by a
wake-up input signal. Except Power down mode, the
data in the registers/FIFOs are retained during the other
power saving modes.
Power Supply Scheme
The table below lists the recommended values of the ex-
ternal bypass capacitors for each power pin of the RF
Transceiver. For the power pins VDD_RF1 and
VDD_3V, an extra bypass capacitor is needed for the
decoupling purpose while the rest of the power pins re-
quire only one bypass capacitor. The path length be-
tween the bypass capacitors to each pin should be
made as short as possible.
Recommended External Bypass Capacitors
Pin Name
VDD_RF1
VDD_RF2
VDD_PLL
VDD_CP
VDD_3V
VDD_D
VDD_A
HT82M75REW/HT82K75REW
Capacitor 1
Bypass
47pF
47pF
10nF
10 F
47pF
47pF
10nF
Capacitor 2
June 11, 2010
Bypass
10nF
10nF

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