ht82k75rew Holtek Semiconductor Inc., ht82k75rew Datasheet - Page 57

• Manufacturer Part Number: ht82k75rew
• Description: Ht82m75rew/ht82k75rew 2.4ghz Transceiver 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

GPIO
The RF Transceiver has 3 digital GPIO pins. Each GPIO
pins can be configured as input or output by
LREG0x23D respectively. When being configured as an
output pad, the driving capability is 4mA for GPIO0 and
1mA for GPIO1 and GPIO2. The status of these pins
can be configured or read by LREG0x23E.
To benefit wide rang applications, GPIO0, GPIO1 and
GPIO2 can be configured to control the external Power
Amplifier (P.A.) and RF switch according to the current
RF state automatically. Please refer to the following sec-
tion named External Power Amplifier Configuration for
details.
Interrupt Signal
The RF Transceiver provides an interrupt output pin
named INT and the polarity of the interrupt signal is
selectable. The RF Transceiver issues interrupts to the
MCU host on three possible events. If one of the three
events happens, the RF Transceiver sets the corre-
sponding status bit in SREG0x31. If the corresponding
Rev. 1.00
The SPI burst mode is provided for the access of long address memory space on a continuous basis. If SEN does
not go high after the 8-bit write data and the SCLK continuously toggles, the followed 8-bit write data is written to
the next address field. Same for the read access, the data of the next address will be read. The SPI burst mode is
only available for the long-address mode.
SCLK
SEN
SO
SO
SI
SI
t
SP
1
1
A10
A10
A9 A8
A9 A8
write long address data
read long address data
t
SD
A7
A7
Timing Diagram of Long Addressing Mode
A6
A6
A5 A4 A3
A5 A4 A3
t
HD
A2 A1 0
A2
A1
1
t
57
X
X
CH
X
X
interrupt mask in SREG0x32 is clear (i.e. equals 0), an
interrupt will be issued on the interrupt output pin INT. If
the corresponding interrupt mask is set to 1 (masked),
no interrupt will be issued, but the status is still present.
Whenever the SREG0x31 register is read, the interrupt
and the status are cleared. The three interrupt events
are described as below:
X
X
Wake-up Alert Interrupt (WAKEIF): Each time a
wake-up event happens the RF Transceiver issues
the interrupt event.
Packet Received Interrupt (RXIF): This interrupt is is-
sued when an available packet is received in the
RXFIFO. An available packet means that it passes a
RXMAC filter, which includes frame type identifying,
address filtering and FCS check.
TX FIFO Release Interrupt (TXNIF): This interrupt can
be issued in two possible conditions. The two condi-
tions are when a packet in TXFIFO is triggered and
sent successfully, or when a packet is triggered and
the retransmission is timed out.
X
X
t
CL
D
D
w
R
7 D
7
D
HT82M75REW/HT82K75REW
R
w
6
6 D
D
R
w
5
5
X
D
D
w
R
4
4
D
D
w
R
3 D
3
D
w
R
2
2
D
D
w
R
1 D
1
D
w
R
0
0
D
D
w
R
7
7
D
D
w
R
6
6
D
D
R
w
5
5 D
D
t
w
R
NS
4
4
June 11, 2010