as7c33512ft32a Alliance Memory, Inc, as7c33512ft32a Datasheet
as7c33512ft32a
Manufacturer Part Number
as7c33512ft32a
Description
3.3v 512k 32/36 Flow-through Synchronous Sram
Manufacturer
Alliance Memory, Inc
Datasheet
1.AS7C33512FT32A.pdf
(19 pages)
December 2004
Features
• Organization: 524,288 words × 32 or 36 bits
• Fast clock to data access: 7.5/8.5/10 ns
• Fast OE access time: 3.5/4.0 ns
• Fully synchronous flow-through operation
• Asynchronous output enable control
• Available in 100-pin TQFP packages
• Individual byte write and global write
• Multiple chip enables for easy expansion
Logic block diagram
Selection guide
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
12/23/04, v 1.4
A[18:0]
ADSC
ADSP
3.3V 512K × 32/36 Flow-through synchronous SRAM
GWE
BWE
CLK
ADV
BW
BW
BW
BW
CE0
CE1
CE2
OE
ZZ
a
d
b
c
Power
down
Alliance Semiconductor
19
D
D
CE
CLK
CLK
D
CLK
D
CLK
D
CLK
D
CE
CLK
D
CLK
CLK
CE
CLR
Byte write
Byte write
Byte write
Byte write
registers
registers
registers
registers
register
Enable
Address
register
register
delay
DQ
DQ
DQ
Enable
DQ
d
c
b
a
275
Burst logic
Q
Q
-75
Q
Q
Q
Q
8.5
7.5
Q
90
60
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate V
• Linear or interleaved burst control
• Snooze mode for reduced power-standby
• Common data inputs and data outputs
LBO
19
Q0
Q1
®
17
19
OE
36/32
Output
buffer
4
250
512K × 32/36
-85
8.5
10
80
60
Memory
DQ[a:d]
array
36/32
36/32
CLK
registers
Input
Copyright © Alliance Semiconductor. All rights reserved.
AS7C33512FT32A
AS7C33512FT36A
230
-10
12
10
80
60
DDQ
1 of 19
Units
mA
mA
mA
ns
ns
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