as7c331mpfs18a Alliance Memory, Inc, as7c331mpfs18a Datasheet
as7c331mpfs18a
Manufacturer Part Number
as7c331mpfs18a
Description
3.3v Pipelined Burst Synchronous Sram
Manufacturer
Alliance Memory, Inc
Datasheet
1.AS7C331MPFS18A.pdf
(19 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
as7c331mpfs18a-166TQC
Manufacturer:
ALLIANCE
Quantity:
1 200
Logic block diagram
Selection guide
Features
• Organization: 1,048,576 x18 bits
• Fast clock speeds to 166MHz
• Fast clock to data access: 3.4/3.8 ns
• Fast OE access time: 3.4/3.8 ns
• Fully synchronous register-to-register operation
• Single-cycle deselect
• Asynchronous output enable control
• Available 100-pin TQFP package
December 2004
Minimum cycle time
Maximum clock frequency
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
12/23/04, v 2.6
A[19:0]
ADSC
ADSP
GWE
BWE
ADV
BW
CLK
BW
CE0
CE1
CE2
OE
ZZ
3.3V 1M x 18 pipelined burst synchronous SRAM
b
a
Power
down
Alliance Semiconductor
20
CLK
CS
D
CLK
CS
CLR
D
D
D
D
CLK
CLK
CE
CLK
CLK
Byte Write
Byte Write
Address
register
registers
registers
register
register
Enable
Enable
delay
DQb
DQa
Burst logic
• Individual byte write and global write
• Multiple chip enables for easy expansion
• 3.3 V core power supply
• 2.5 V or 3.3V I/O operation with separate V
• Linear or interleaved burst control
• Common data inputs and data outputs
• Snooze mode for reduced power-standby
Q
Q
Q
Q
Q
LBO
-166
166
290
3.4
90
60
6
20
®
18
20
OE
CLK
registers
Output
2
18
1M x 18
Memory
18
DQ[a,b]
array
-133
133
270
3.8
7.5
CLK
80
60
registers
18
Input
Copyright © Alliance Semiconductor. All rights reserved.
AS7C331MPFS18A
DDQ
Units
MHz
mA
mA
mA
ns
ns
1 of 19