as7c31026b Alliance Memory, Inc, as7c31026b Datasheet - Page 4

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as7c31026b

Manufacturer Part Number
as7c31026b
Description
3.3 V 64k X 16 Cmos Sram
Manufacturer
Alliance Memory, Inc
Datasheet

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Read cycle (over the operating range)
Key to switching waveforms
Read waveform 1 (address controlled)
Read cycle time
Address access time
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE low to output in low Z
CE high to output in high Z
OE low to output in low Z
Byte select access time
Byte select Low to low Z
Byte select High to high Z
OE high to output in high Z
Power up time
Power down time
3/26/04, v 1.3
Address
Data
OUT
Parameter
Rising input
Previous data valid
t
OH
Symbol
t
t
t
t
t
t
t
t
t
t
t
ACE
t
CHZ
OLZ
BHZ
OHZ
t
t
CLZ
BLZ
RC
AA
OE
OH
BA
PU
PD
Alliance Semiconductor
3,9
Min
3,6,7,9
10
3
3
0
0
0
-10
t
AA
Max
10
10
10
5
3
5
5
5
Falling input
Min
12
3
3
0
0
0
t
RC
®
-12
Max
12
12
12
6
3
6
6
6
Data valid
Min
15
3
3
0
0
0
-15
Max
15
15
15
7
4
7
6
7
Undefined output/don’t care
Min
20
3
3
0
0
0
-20
t
Max
OH
20
20
20
8
5
8
8
8
AS7C31026B
Unit Notes
P. 4 of 10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
3
3
5

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