as7c3256a Alliance Memory, Inc, as7c3256a Datasheet - Page 5

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as7c3256a

Manufacturer Part Number
as7c3256a
Description
3.3v 32k X 8 Cmos Sram Common I/o
Manufacturer
Alliance Memory, Inc
Datasheet

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4/23/04; v.2.0
Write cycle (over the operating range)
Write waveform 1 (WE controlled)
Write waveform 2 (CE controlled)
Write cycle time
Chip enable to write end
Address setup to write end
Address setup time
Write pulse width
Write recovery time
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in high Z
Output active from write end
Address
Address
D
WE
CE
D
D
WE
out
D
out
in
in
Parameter
t
AS
t
AS
Symbol
t
t
t
t
t
t
t
t
t
t
t
WC
CW
AW
WR
DW
OW
WP
AH
DH
WZ
AS
Alliance Semiconductor
10,11
t
10,11
t
WZ
WZ
t
AW
Min
11
10
8
8
0
7
0
0
5
0
3
t
AW
t
-10
CW
t
t
t
WP
WC
WC
Max
t
WP
5
t
DW
Data valid
Min
12
8
8
0
8
0
0
6
0
3
t
DW
Data valid
®
-12
Max
6
t
AH
t
DH
t
OW
Min
15
10
10
0
9
0
0
8
0
3
t
WR
-15
t
t
t
WR
AH
DH
Max
7
Min
20
12
12
12
10
0
0
0
0
3
-20
Max
8
AS7C3256A
P. 5 of 9
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
4, 5
4, 5
4, 5

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