bs62lv4005si Brillance Semiconductor, bs62lv4005si Datasheet

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bs62lv4005si

Manufacturer Part Number
bs62lv4005si
Description
Low Power/voltage Cmos Sram 512k X 8 Bit
Manufacturer
Brillance Semiconductor
Datasheet
R0201-BS62LV4005
• Vcc operation voltage : 4.5V ~ 5.5V
• Low power consumption
• High speed access time :
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
Vcc = 5.0V
PIN CONFIGURATIONS
Brilliance Semiconductor Inc
FEATURES
PRODUCT FAMILY
BS62LV4005SC
BS62LV4005EC
BS62LV4005TC
BS62LV4005STC
BS62LV4005PC
BS62LV4005SI
BS62LV4005EI
BS62LV4005TI
BS62LV4005STI
BS62LV4005PI
-70
-55
PRODUCT
VC
A11
A13
A17
A15
A18
A16
A14
A12
FAMILY
WE
A9
A8
A7
A6
A5
A4
C
BSI
GND
DQ0
DQ1
DQ2
A18
A16
A14
A12
70ns (Max.) at Vcc = 5.0V
55ns (Max.) at Vcc = 5.0V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A7
A6
A5
A4
A3
A2
A1
A0
1.5uA
C-grade: 45mA (Max.) operating current
I -grade: 50mA (Max.) operating current
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BS62LV4005SC
BS62LV4005SI
BS62LV4005EC
BS62LV4005EI
BS62LV4005PC
BS62LV4005PI
BS62LV4005TC
BS62LV4005STC
BS62LV4005TI
BS62LV4005STI
(Typ.) CMOS standby current
-40
TEMPERATURE
+0
OPERATING
O
O
Low Power/Voltage CMOS SRAM
512K X 8 bit
C to +70
C to +85
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
O
O
C
C
. reserves the right to modify document contents without notice.
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
4.5V ~ 5.5V
4.5V ~
RANGE
Vcc
5.5V
Vcc = 5.0V
SPEED
55 / 70
55 / 70
The BS62LV4005 is a high performance, low power CMOS
Static Random Access Memory organized as 524,288 words by 8 bits
and operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with maximum access time of 55/ 70ns
in 5V operation.
Easy memory expansion is provided by active LOW chip
enable (CE), active LOW output enable (OE) and three-state
output drivers.
The BS62LV4005 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV4005 is available in the JEDEC standard 32 pin SOP
, TSOP, TSOP II and STSOP .
1
( ns )
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
A13
A17
A15
A18
A16
A14
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
Vdd
Gnd
A7
A6
A5
A4
WE
CE
OE
Address
Buffer
Input
( I
Vcc = 5.0V
STANDBY
8
Control
CCSB1
8
25uA
15uA
POWER DISSIPATION
, Max )
22
Output
Buffer
Buffer
Data
Input
Data
Decoder
Row
Operating
Vcc=5.0V
( I
8
2048
45mA
50mA
CC
8
BS62LV4005
, Max )
A11 A9 A8 A3 A2 A1 A0 A10
Address Input Buffer
Column Decoder
Memory Array
2048 X 2048
Sense Amp
Write Driver
Column I/O
2048
256
16
PKG TYPE
SOP-32
STSOP-32
SOP-32
STSOP-32
TSOP2-32
TSOP-32
TSOP2-32
TSOP-32
Revision 2.4
April 2002
PDIP-32
PDIP-32

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bs62lv4005si Summary of contents

Page 1

... C to +85 BS62LV4005TI BS62LV4005STI BS62LV4005PI PIN CONFIGURATIONS A18 1 32 A16 2 31 A14 3 30 A12 BS62LV4005SC 8 25 BS62LV4005SI BS62LV4005EC BS62LV4005EI BS62LV4005PC BS62LV4005PI DQ0 13 20 DQ1 14 19 DQ2 15 18 GND 16 17 A11 1 A9 ...

Page 2

BSI PIN DESCRIPTIONS Name A0-A18 Address Input CE Chip Enable Input WE Write Enable Input OE Output Enable Input DQ0-DQ7 Data Input/Output Ports Vcc Gnd TRUTH TABLE MODE WE Not selected X Output Disabled H Read H Write L ABSOLUTE ...

Page 3

BSI DC ELECTRICAL CHARACTERISTICS PARAMETER PARAMETER NAME Guaranteed Input Low V IL (2) Voltage Guaranteed Input High V IH (2) Voltage I Input Leakage Current IL I Output Leakage Current OL V Output Low Voltage OL V Output High Voltage ...

Page 4

BSI AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level AC TEST LOADS AND WAVEFORMS 1928 Ω 5.0V OUTPUT 100PF INCLUDING Ω 1020 JIG AND SCOPE FIGURE 1A THEVENIN EQUIVALENT 667 OUTPUT ...

Page 5

BSI SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE1 ADDRESS D OUT (1,3,4) READ CYCLE2 CE D OUT (1,4) READ CYCLE3 ADDRESS OUT NOTES high for read Cycle. 2. Device is continuously selected when CE ...

Page 6

BSI AC ELECTRICAL CHARACTERISTICS WRITE CYCLE JEDEC PARAMETER PARAMETER NAME NAME t t AVAX E1LWH AVWL AVWH WLWH WHAX WLOZ WHZ t ...

Page 7

BSI (1,6) WRITE CYCLE2 ADDRESS OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. All signals ...

Page 8

BSI ORDERING INFORMATION BS62LV4005 PACKAGE DIMENSIONS SOP -32 R0201-BS62LV4005 WITH PLATING BASE METAL SECTION A-A 8 BS62LV4005 SPEED 70: 70ns 55: 55ns GRADE + ...

Page 9

BSI PACKAGE DIMENSIONS (continued) TSOP2 - 32 TSOP - 32 R0201-BS62LV4005 9 BS62LV4005 Revision 2.4 April 2002 ...

Page 10

BSI PACKAGE DIMENSIONS (continued) STSOP - 32 PDIP - 32 R0201-BS62LV4005 10 BS62LV4005 Revision 2.4 April 2002 ...

Page 11

BSI REVISION HISTORY Revision Description 2.2 2001 Data Sheet release 2.3 Modify Standby Current (Typ. and Max.) 2.4 Modify some AC parameters. R0201-BS62LV4005 Date Apr. 15, 2001 Jun. 29, 2001 April,10,2002 11 BS62LV4005 Note Revision 2.4 April 2002 ...

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