hsp50214b Intersil Corporation, hsp50214b Datasheet - Page 51

• Manufacturer Part Number: hsp50214b
• Description: Programmable Downconverter
• Manufacturer: Intersil Corporation

POSITION
POSITION
POSITION
POSITION
31-12
31-8
11-4
BIT
BIT
N/A
BIT
N/A
BIT
7-0
2-0
3
Reserved
Timing NCO Phase
Offset
Timing Frequency
Strobe
Timing Phase Strobe
Reserved
Re-Sampler Output
Pulse Delay
Re-Sampler Bypass
Filter Mode Select;
2- HB2 Enabled
1- HB1 Enabled
0- Re-Sampler
Enabled
FUNCTION
FUNCTION
FUNCTION
FUNCTION
CONTROL WORD 16: RESAMPLING FILTER CONTROL (SYNCHRONIZED TO PROCCLK)
CONTROL WORD 14: TIMING FREQUENCY STROBE (SYNCHRONIZED TO PROCCLK)
CONTROL WORD 15: TIMING PHASE STROBE (SYNCHRONIZED TO PROCCLK)
CONTROL WORD 13: TIMING PHASE OFFSET (SYNCHRONIZED TO PROCCLK)
51
Reserved.
These bits are used to offset the phase of the Timing NCO. The range is 0 to 1 times the resampler input
period interpreted either as ± T/2 (2’s complement) or 0 to T (offset binary). Bit 7 is the MSB. This location
is a holding register. After loading, a transfer to the Active Register is done by writing to Control Word 15
or by generating a SYNCIN2 with Control Word 11, Bit 5 set to 1.
Writing to this address updates the active timing NCO Frequency Register in the timing NCO (see Timing
NCO Section).
Writing to this address updates the active timing NCO Phase Offset Register in the timing NCO (see
Timing NCO Section).
Reserved.
NOTE: These bits program the delay between output samples when interpolating. The extra outputs can
NOTE: If less than 5 is programmed, there will not be sufficient time to fully update the output
0- Resampling Filter Enabled. A valid combination of bits 2-0 must also be selected.
1- Resampling Filter Section (including Interpolation halfband filters) is bypassed.
000- Not Valid.
001- Re-Sampler Enabled.
010- Halfband 1 Enabled.
011- Re-Sampler and Halfband Filter 1 Enabled.
100- Not Valid.
101- Not Valid.
110- Both Halfband Filters Enabled.
111- Re-Sampler and Both Halfband Filters Enabled.
be delayed from 2 to 255 clocks from the first output. A delay of 2 equals 255 clocks of delay. A
delay of 0 or 1 is an invalid mode. When interpolating by 2, one extra output is generated; when
interpolating by 4, 3 extra outputs are generated. Program by the equation (PROCCLK/f
Bit 11 is the MSB.
buffer. If less than 16 is programmed, the serial output may be preempted. This means that
it won’t finish and if the sync is programmed to follow the data, there may never be a sync.
HSP50214B
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
May 1, 2007
OUT
FN4450.4
) - 1.