ipm6210a Intersil Corporation, ipm6210a Datasheet - Page 6

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ipm6210a

Manufacturer Part Number
ipm6210a
Description
Precision Dual Pwm Controller And Linear Regulator For Notebook Cpus
Manufacturer
Intersil Corporation
Datasheet

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Functional Pin Descriptions
VID0, VID1, VID2, VID3, VID4 (Pins 11, 10, 9, 8 and 7
Respectively)
VID0-VID4 are the input pins to the 5-bit DAC. The states of
these five pins program the internal voltage reference
(DACOUT). The level of DACOUT sets the core converter
output voltage (V
and OVP thresholds.
BOOT1, BOOT2 (Pins 25 and 3)
These pins provide power to the upper MOSFET drivers of
the core and I/O converters. Connect these pins to their
respective junctions of the bootstrap capacitors and the
cathodes of the bootstrap diodes. The anodes of the
bootstrap diodes are connected to pin 28, VCC.
PHASE1, PHASE2 (Pins 23 and 5)
The PHASE nodes are the junction points of the upper
MOSFET sources, output filter inductors, and lower
MOSFET drains. Connect the PHASE pins to the respective
PWM converter’s upper MOSFET source.
ISEN1, ISEN2 (Pins 22 and 6)
These pins are used to monitor the voltage drop across the
lower MOSFETs for current feedback, output voltage droop and
overcurrent protection. For precise current detection these
inputs could be connected to optional current sense resistors
placed in series with sources of the lower MOSFETs. To set the
gain of the current sense amplifier, a resistor should be placed
in series with each of these inputs.
UGATE1, UGATE2 (Pins 24 and 4)
These pins provide the gate drive for the upper MOSFETs.
LGATE1, LGATE 2 (Pin 27 and 1)
These pins provide the gate drive for the lower MOSFETs.
PGND1, PGND2 (Pin 26 and 2)
These are the power ground connection for the core and I/O
converters, respectively. Tie each lower MOSFET source to
the corresponding pin.
VSEN2 (Pin 12)
This pin is connected to the I/O output and provides voltage
feedback to the I/O error amplifier. The PGOOD, UVP and
OVP comparators use this signal.
V3IN (Pin 13)
This pin provides input power for the 2.5V linear regulator.
The typical input voltage for that pin is 3.3V. Alternatively,
5.0V system rail can be used while efficiency will be
proportionally lower.
VOUT3 (Pin 14)
Output of the 2.5V linear regulator. Supplies current up to
150mA. The output current on this pin is internally limited to
250mA.
OUT1
). It also sets the core PGOOD, UVP
6
IPM6210A
VSEN1, VRTN1 (Pins 17 and 16)
These pins are connected to the core converter’s output
voltage to provide remote sensing. The PGOOD, UVP and
OVP comparators use these pins for protection.
SOFT (Pin 18)
Connect a capacitor from this pin to the ground. This capacitor
(typically 0.1mF), along with an internal 25mA current source,
sets the soft-start interval of the converter. When voltage on this
pin exceeds 0.9V, the soft start is completed. After the soft-start
is completed, the pin function is changed. The internal circuit
regulates voltage on this pin to the value commanded by VID
code. The pin now has 500mA source/sink capability that
allows to set desired slew rate for upward and downward VID
code changes.
VIN (Pin 19)
VIN provides battery voltage to the oscillator for feed-forward
rejection of input voltage variations.
EN (Pin 20)
This pin enables IC operation when left open or pulled-up to
VCC. Also, it unlatches the chip after fault when being
cycled.
PGOOD (Pin 21)
PGOOD is an open drain output used to indicate the status
of the PWM converters’ output voltages. This pin is pulled
low when the core output is not within ±10% of the DACOUT
reference voltage, or when any of the other outputs are not
within their respective undervoltage and overvoltage
thresholds.
The PGOOD output is pulled low for “01111” and ‘11111’ VID
code. See Table 1.
GND (Pin 15)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
VCC (Pin 28)
Supplies all the power necessary to operate the chip. The IC
starts to operate when the voltage on this pin exceeds 4.5V and
shuts down when the voltage on this pin drops below 4.0V.
Description
Operation Overview
The IPM6210A three-in-one power management integrated
circuit provides complete power solution for modern
processors for notebook and sub-notebook PCs. The IC
controls operation of two synchronous buck converters and
one linear regulator. The output voltage of the core converter
can be adjusted in the range from 0.925V to 2.0 by changing
the DAC code settings (see Table 1). The output voltage of
the I/O converter is fixed to 1.5V. The internal linear regulator
provides fixed 2.5V for the CPU clock generator from the
system +3.3V bus. The output voltage of the core converter

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