ipm6210a Intersil Corporation, ipm6210a Datasheet - Page 8

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ipm6210a

Manufacturer Part Number
ipm6210a
Description
Precision Dual Pwm Controller And Linear Regulator For Notebook Cpus
Manufacturer
Intersil Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ipm6210aCA
Manufacturer:
HARRIS
Quantity:
11
Part Number:
ipm6210aCA
Quantity:
750
NOTE:
2. 0 = Connected to GND or V
VID4
through pull-up resistors.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
PIN NAME
VID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TABLE 1.
SS
8
, 1 = open or connected to 3.3V
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
NOMINAL
VOLTAGE
No CPU
No CPU
OUT1
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
IPM6210A
Mode-Compensated Droop
An output voltage ‘droop’ or an active voltage positioning is
now widely used in the computer power applications. The
technique is based on raising the converter voltage at light
load in anticipation of the possible load current step.
Inversely, the output voltage is lowered at high load in
anticipation of possible load drop. The output voltage varies
with the load like it is a resistor connected in series with the
converter’s output. When done as a part of the feedback in a
closed loop, the ‘droop’ is not associated with substantial
power losses, though. There is no such a resistor in a real
circuit, but the feature is rather emulated by the feedback.
The ‘droop’ allows a reduction in size and cost of the output
capacitors required to handle the transient. Additionally, the
CPU power dissipation is also slightly reduced as it is
proportional to the applied voltage squared and even a slight
voltage decrease translates to a measurable reduction in
power dissipated.
When powering the dual mode processor, it is desired to have
an adequate “droop” (equal fractions of the programmed
output voltage) in both performance and battery-optimized
modes of operation. The traditional “droop” is normally tuned
to the worse case load, which is associated with the
performance mode. In the battery optimized mode, the CPU
operating voltage and the clock frequency are both scaled
down. Due to the constant gain in the current loop, the
traditional ‘droop’ compensates only for the operating voltage
change. The degree of the droop achieved in this case is not
the same because the CPU current is significantly lower as it
is illustrated by the following equation.
Where, K
operating voltage; F
a coefficient that varies from 0 to 1 and indicates how heavily
the processor is engaged by the software; i is a denominator
associated with the processor mode of operation
(performance or battery optimized).
I
C PU
V
1.35
CPU
1.6
=
K
CPU
FIGURE 2. MODE-COMPENSATED DROOP
CPU
0
BATTERY-OPTIMIZED MODE
is a processor constant; V
x V
CPUi
PERFORMANCE MODE
CPUi
xF
CPUi
is processor clock frequency; K
5
x K
F
MODE-COMPENSATED DROOP
TRADITIONAL DROOP
;
CPUi
is processor
10
I
CPU
F
is

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