cx3072 Chip Express Corporation, cx3072 Datasheet

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cx3072

Manufacturer Part Number
cx3072
Description
0.35um Structured Asic
Manufacturer
Chip Express Corporation
Datasheet
Product Description
Key Features and Benefits
April 9, 2007
The CX3000, 0.35 µ m Structured ASIC product family offers cost-effective, rapid
turnaround of ASIC devices. Using ChipX’s innovative architecture, flexible
manufacturing alternatives are available that permit options for rapid turnaround time
and scalable volume production. The CX3000 product services those applications
requiring ASIC performance in the networking, communications, computing, and
industrial marketplace.





















CX3000
0.35um Structured ASIC
Structured ASIC architecture
Low NRE and start-up costs
Fast time to production
21K to 200K usable logic gates (2 input NAND gate equivalent)
0.3 µ W/MHz/Gate @ 3.3V
5V and 3.3V core voltage
Rich I/O libraries (2308 cells)
Programmable I/O pads for power, ground, or I/O
5V drive or 3.3V drive with 5V tolerance (5V tolerant compliant I/O requires a
reference bias voltage)
3.3V PCI-compliant at 66MHz
Differential input support modes
Configurable embedded synchronous memory
16K to 352K bits of single-port or dual-port SRAM or ROM
290MHz SRAM worst-case operation @ 3.3V for single-port and dual-port RAM
4 APLL
>200MHz worst-case operation @ 3.3V
Verilog/VHDL synthesis and simulation support
DRC utilities (Check_all)
Clock Tree Synthesis (CTS) with <500ps clock-skew
Automatic cross-talk handling
Memory BIST generator
0283-3k-080-A
Data Sheet
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cx3072 Summary of contents

Page 1

CX3000 0.35um Structured ASIC Product Description The CX3000, 0.35 µ m Structured ASIC product family offers cost-effective, rapid turnaround of ASIC devices. Using ChipX’s innovative architecture, flexible manufacturing alternatives are available that permit options for rapid turnaround time and scalable ...

Page 2

... CX3000 Products Usable ASIC Base Array Gates (K) CX3041 CX3061 CX3141 CX3301 CX3303 CX3403 CX3072 CX3122 CX3422 Note: Each memory block can be used as one dual-port memory or two single-port memories. Max I/O include both signals and power/ground. CX3000 Cell Library  Synopsys DC Support  Low power flip-flops ...

Page 3

CX3000 0.35um Structured ASIC Table 2 Absolute Maximum Ratings Symbol V Core supply voltage DD V (3.3V) DDIO V (5V) DDIO V DC input voltage range IN T Junction temperature J T Storage temperature STG T Soldering lead temperature (10 ...

Page 4

CX3000 0.35um Structured ASIC development every time. The ChipX Design Toolkit checks design constraints, I/O rules, typical, min and max case timing, glitches, contention and handoff database completeness. Our standard ASIC and FPGA design flows are shown in Figure 1. ...

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