cx3072 Chip Express Corporation, cx3072 Datasheet - Page 2

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cx3072

Manufacturer Part Number
cx3072
Description
0.35um Structured Asic
Manufacturer
Chip Express Corporation
Datasheet
The CX3000 ASIC Family
CX3000 Cell Library
Power Pin Assignment
Input and Output Bidirectional Cells
Recommended Operating Conditions
2 of 4
CX3000
0.35um Structured ASIC
Available products in the CX3000 product family are shown in Table 1.
Table 1
Note:
All I/O cells are programmable as VDD, VSS, input, output, or bidirectional. This
flexibility allows the user to properly ratio power pins with output drive requirements or to
match specific pin-out when replacing existing devices.
The CX3000 library contains a large selection of input, output, and bidirectional cells
that accommodate a wide range of designs. Input cells can be personalized with internal
pull-up or pull-down resistors and with or without hysteresis. Output cells include slew
rate control, current drive capability from 2mA to 12mA, as well as N channel and P
channel open drains. If required, outputs can be used in parallel to enable increased
drive capability. Each I/O can be programmed independently for 3.3V or 5V.
Table 2, 3, and 4 provide data related to absolute maximum ratings, recommended
operating conditions, and DC characteristics over operating conditions.





Base Array
Synopsys DC Support
Low power flip-flops
Built-in scan MUX in flip-flops
Multiplexers, decoders
Tri-state/drive cells
CX3041
CX3061
CX3141
CX3301
CX3303
CX3403
CX3072
CX3122
CX3422
CX3000 Products
Each memory block can be used as one dual-port memory or two single-port
memories. Max I/O include both signals and power/ground.
Usable ASIC
Gates (K)
150
150
200
200
21
33
68
40
70
0283-3k-080-A
Embedded
Memory
(K bits)
144
144
352
48
64
96
32
48
96
Instantiations
Max Memory
12
16
18
44
12
6
8
4
6
APLL
4
4
4
4
4
4
4
4
4
ChipX Data Sheet
April 9, 2007
Max I/O
160
208
304
432
432
528
128
160
304

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