ep1m120 Altera Corporation, ep1m120 Datasheet - Page 20

• Manufacturer Part Number: ep1m120
• Description: Programmable Logic Device Family
• Manufacturer: Altera Corporation

Mercury Programmable Logic Device Family Data Sheet
Figure 8. Normal-Mode LE
Notes to
(1)
(2)
(3)
20
Previous LE (2)
Carry-In from
LEs in normal mode support register packing.
When using the carry-in in normal mode, the packed register feature is unavailable.
There are two LAB-wide clock enables per LAB in addition to LE-specific clock enables.
Figure
data1
data2
data3
data4
8:
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, accumulators, and
comparators. A LE in arithmetic mode contains four 2-input LUTs. The
first two 2-input LUTs compute two summations based on a possible
carry of 1 or 0; the other two LUTs generate carry outputs for the two
possible chains of the carry-select look-ahead (CSLA) circuitry. As shown
in
(either carry-in0 or carry-in1). The logic level of the chain selected
in turn selects which parallel sum is generated as a combinatorial or
registered output. For example, when implementing an adder, this output
is the signal comprised of the sum data1 + data2 + carry, where carry is
0 or 1. The other two LUTs use the data1 and data2 signals to generate
two possible carry-out signals—one for a carry of 1 and the other for a
carry of 0. The carry-in0 signal acts as the carry select for the
carry-out0 output; carry-in1 acts as the carry select for the
carry-out1 output. LEs in arithmetic mode can drive out registered and
unregistered versions of the LUT output.
arithmetic mode.
Note (1)
Figure
4-Input
LUT
9, the LAB carry-in signal selects the appropriate carry-in chain
LAB-Wide Clock Enable (3)
PRN/ALDn
D
ENA
CLRN
Q
Figure 9
Combinatorial
Output
Registered
Output
shows a Mercury LE in
Altera Corporation
LE-Out
LE-Out
LE-Out