hs3120b-2-883 Exar Corporation, hs3120b-2-883 Datasheet - Page 4

• Manufacturer Part Number: hs3120b-2-883
• Description: Double-buffered 12-bit Multiplying Dac
• Manufacturer: Exar Corporation

116
PIN ASSIGNMENTS
Pin 1 – FB
Pin 2 – LDTR – Ladder Termination
Pin 3 – FB
Pin 4 – V
Pin 5 – FB
Pin 6 – I
Pin 7 – I
Pin 8 – V
Pin 9 – DB
Pin 10 – DB
Pin 11 – DB
Pin 12 – DB
Pin 13 – DB
Pin 14 – DB
Pin 15 – DB
Pin 16 – DB
Pin 17 – DB
Pin 18 – DB
Pin 19 – DB
Pin 20 – DB
Pin 21 – LDAC – Transfers data from input to
DAC register; a logic “0” latches data into
registers; a logic “1” allows data to change
(transfer to) register.
Pin 22 – CE – Chip Enable, active low
Pin 23 – LBE – Bit 12 to Bit 9 Enable
Pin 24 – MBE – Bit 8 to Bit 5 Enable
Pin 25 – HBE – Bit 4 to Bit 1 Enable
Pin 26 – V
Register
Pin 27 – V
Pin 28 – V
NOTE: Pins 8 and 27, and pins 26 and 28 must
be connected externally.
O1
O2
SS
REF
4
3
1
SS1
DD1
– Ground, Analog and DAC Register
11
– Current out into virtual ground
– Current out-complement of I
– Feedback Bipolar Operation
– Feedback Bipolar Operation
– Feedback, Unipolar/Bipolar
10
9
8
7
6
5
4
3
2
1
0
DD2
– Reference Voltage Input
– MSB, Data Bit 1
– Data Bit 3
– Data Bit 4
– Data Bit 5
– Data Bit 6
– Data Bit 7
– Data Bit 8
– Data Bit 9
– Data Bit 10
– Data Bit 11
– LSB, Data Bit 12
– Ground input latches
– Data Bit 2
– Supply input latches
– Supply Analog and DAC
01
FEATURES…
The SP7512 and HS3120 are precision 12-bit
multiplying DACs with internal two-stage input
storage registers for easy interfacing with mi-
croprocessor busses. The DACs are implemented
as a one-chip CMOS circuit with a resistor
ladder network designed for 0.01% linearity
without laser trimming.
The input registers are sectioned into 3 seg-
ments of 4 bits each, all individually address-
able. The DAC-register, following the input
registers, is a parallel 12-bit register for holding
the DAC data while the input registers are up-
dated. Only the data held in the DAC register
determines the analog output value of the con-
verter.
The SP7512 and HS3120 have been designed
for great flexibility in connecting to bus-ori-
ented systems. The 12 data inputs are organized
into 3 independent addressable 4-bit input reg-
isters such that the DACs can be connected to
either a 4, 8 or 16-bit data bus. The control logic
of the DACs includes chip enable and latch
enable inputs for flexible memory mapping. All
controls are level-triggered to allow static or
dynamic operation.
A total of 5 output lines are provided on the
DACs to allow unipolar and bipolar output
connection with a minimum of external compo-
nents. The feedback resistor is internal. The
resistor ladder network termination is exter-
nally available, thus eliminating an external
resistor for the 1 LSB offset in bipolar mode.
The SP7512 is available for use in commercial
and industrial temperature ranges, packaged in
Figure 1. Unipolar Operation
LDAC
MBE
HBE
LBE
CE
DIGITAL
INPUTS
V REF
SP7512
V DD2
V SS
V DD1
400
V SS1
FB 1
I O1
LDTR
FB 4
FB 3
I O2
+15V
SIGNAL PROCESSING EXCELLENCE
R OS
+
-
Corporation
A
V OUT