ml7051la Oki Semiconductor, ml7051la Datasheet - Page 11
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ml7051la
Manufacturer Part Number
ml7051la
Description
Bluetooth Baseband Controller Ic
Manufacturer
Oki Semiconductor
Datasheet
1.ML7051LA.pdf
(24 pages)
USB Block
UART Block
1 Semiconductor
Timing Generator
- Bluetooth clock generation
- Operation interrupts depend on mode (slot, scan, sniff, hold, park)
- Sync detection timing generation (sync window ±10 s)
- PLL setting timing generation
- Transmit/Receive timing generation
- Multi-master timing management function
Packet Composer
- Access code generation (SyncWord generation, appending PR*TRAILER)
- Packet header generation (HEC generation, scrambling, FEC encoding)
- Payload generation (CRC generation, encryption, scrambling, FEC encoding)
- Packet synthesis
Packet Decomposer
- Packet decomposition (separating the packet header and the payload)
- Packet header processing (FEC decoding, descrambling, HEC error detection, header information separation)
- Payload processing (FEC decoding, descrambling, encryption decoding, CRC judgement, payload
Security
- Various key generation functions (initialization, link key, encryption key)
- Certification function
- Encryption function
Conforms to USB standard Ver. 1.1.
Supports 12 Mbps transfer
Supports four data transfer types (control transfer, bulk transfer, interrupt transfer, and isochronous transfer)
Built-in USB transceiver circuit
5 or 6 built-in end points, and built-in FIFO for data storage
8-, 16-, 24-, 32-bit read/write is possible for the FIFOs of EP0 to EP5 (with byte control)
Full-duplex buffering method
All status reporting function
Built-in 64-byte transmit/receive FIFO
Modem control based on CTS, DCD, and DSR
Programmable serial interface
5-, 6-, 7-, 8-bit characters
Generation and verification of odd parity, even parity, or no parity
1, 1.5, or 2 stop bits
Programmable Baud Rate Generator (1200 bps to 921.6 kbps)
Error servicing for parity, overrun, and framing errors
separation)
FEDL7051LA-02
ML7051LA
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