ml7019 ETC-unknow, ml7019 Datasheet - Page 6

• Manufacturer Part Number: ml7019
• Description: Single Rail Dual Channel Codec
• Manufacturer: ETC-unknow

l ML7019
DOUT
PDN
ALAW
DOUT is a data output pin.
Signal which consist of a total 28 bits configured by the voice band PCM signal(16
bits for 2CH), the echo bit(6 bits for latch signal and 2 bits for power down state
indication), and empty bit(4 bits),
The output signal is output from CH1's MSD bit in a sequential order, synchronizing
with the rising edge of the BCLK signal.
The first bit of DOUT may be output at the rising edge of the XSYNC signal, based
on the timing between BCLK and XSYNC.
This pin is in a high impedance state during power saving state or power down
state.
A pull-up resistor must be connected to this pin because it is an open drain output.
This device is compatible with ITU-T recommendation on coding law and output
coding format.
Power down control signal.
When PDN is at logic "0" level, both CH1 and CH2 circuits are in a power down
state. Also the all internal latches are in initial state(logic "0" level).
Control signal input of the companding law selection.
The CODEC will operate in the
CODEC will operate in the A-law when this pin is at a logic "1" level. The CODEC
operates in the
INPUT / OUTPUT
+ Full scale
- Full scale
Level
-law if the pin is left open, as this pin is internally pulled down.
+ 0
- 0
MSD
ALOW = 0 ( -law )
1 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
0 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
-law when this pin is at a logic "0" level and the
PCMIN / PCMOUT
MSD
ALOW = 1 ( A-law )
1 0 1 0 1 0 1 0
1 1 0 1 0 1 0 1
0 1 0 1 0 1 0 1
0 0 1 0 1 0 1 0
6