ml7037 Oki Semiconductor, ml7037 Datasheet - Page 15

• Manufacturer Part Number: ml7037
• Description: Ml7037-003 Dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free
• Manufacturer: Oki Semiconductor

Not for Publication
GPIB7 (ECEN)
This is a general-purpose input port pin.
This also works as an enabling/disabling selection for echo cancellers as the secondary function.
A logic ‘0’ disables echo cancellers and their auxiliary functions (ATTrA/ATTrL, ASIPAD/LPAL,
ASOPAD/LSOPAD, ATTsA/ATTrA, Center Clip), and a logic ‘1’ enables them.
When the MCUSEL pin is logic ‘1’, this pin is automatically assigned with its secondary function.
When the MCUSEL pin is logic ‘0’, this pin’s function assignment follows the state of GPFB7-bit [GPCR1-B7].
(Note) The change of the input state to this pin is detected at the rising edge of the SYNC clock so that the change
(Note) If this pin is not used, set this pin to a logic ‘0’.
GPIA0 (TPAD0), GPIA1 (TPAD1), GPIA2 (TPAD2), GPIA3 (TPAD3)
These are general-purpose input port pins.
These also work as transmit-side volume control as the secondary function.
For the setting, please refer to Table 1.
When the MCUSEL pin is logic ‘1’, these pins are automatically assigned with their secondary function.
When the MCUSEL pin is logic ‘0’, these pins’ function assignment follows the state of GPFA3-0-bits
[GPCR0-B3,2,1,0].
(Note) The change of the input state these pins is detected at the rising edge of the SYNC clock so that the change
(Note) If these pins are not used, set them to a logic ‘0’.
GPIA4(RPAD0), GPIA5(RPAD1), GPIA6(RPAD2), GPIA7(RPAD3)
These are general-purpose input port pins.
These also work as receive-side volume control as the secondary function.
For the setting, please refer to Table 1.
When the MCUSEL pin is logic ‘1’, these pins are automatically assigned with their secondary function.
When the MCUSEL pin is logic ‘0’, these pins’ function assignment follows the state of GPFA7-4-bits
[GPCR0-B7,6,5,4].
(Note) The change of the input state to these pins is detected at the rising edge of the SYNC clock so that the
(Note) If these pins are not used, set them to a logic ‘0’.
OKI Semiconductor
of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
change of the input state to this pin less than 250 s may not be reflected as the LSI behavior.
(RPAD3)
GPIA7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
(RPAD2)
GPIA6
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
Table 1 Receive-/Transmit-Side Volume Control
(RPAD1)
GPIA5
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
(RPAD0)
GPIA4
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
(TPAD3)
GPIA3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
(TPAD2)
GPIA2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
(TPAD1)
GPIA1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
PEDL7037-003-05Zz_Digest
(TPAD0)
GPIA0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
ML7037-003
Level
+21dB
+18dB
+15dB
+12dB
MUTE
-12dB
-15dB
-18dB
-21dB
+9dB
+6dB
+3dB
-3dB
-6dB
-9dB
0dB
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