ml7037 Oki Semiconductor, ml7037 Datasheet - Page 34

• Manufacturer Part Number: ml7037
• Description: Ml7037-003 Dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free
• Manufacturer: Oki Semiconductor

Not for Publication
INTERNAL DATA MEMORY ACCESS
The ML7037-003 has an area called the internal data memories (16-bit wide address and 16-bit wide data), and
operates reading variables such as coefficients and thresholds retained therein. By alternating the data in the given
memory addresses, the default state could be customized.
How to Write into the Internal Data Memory
The CR6 (A15-A8) and the CR7 (A7-A0) are registers to specify the address of the internal data memory to alter.
The CR8 (D15-D8) and the CR9 (D7-D0) are registers to store the data to write into the internal data memory to
alter.
When the MCUSEL pin is given a logic ‘0’, the ML7037-003 automatically transits into the initial mode 250ms
(approx.) after a release of power-down reset by the PDN pin or the SPDN-bit [CR0-B7], and the READY-bit
[CR10-B7] turns to be a logic ‘1’ which shows the ML7037-003 has got ready for the control register access.
During this initial mode, specify both the 16-bit wide address by the CR6-CR7 and the 16-bit wide data by the
CR8-CR9 first, and then write a logic ‘1’ into the DMWR-bit [CR1-B7], which executes alternation of the internal
data memory in the given address. After the internal data memory alternation, the DMWR-bit [CR1-B7]
automatically is cleared to be a logic ‘0’. The flow of this internal data memory access is shown in Figure 26.
When more than an internal data memory, repeat the procedure above. A change of the OPE_STAT-bit [CR0-B0]
to a logic ‘1’ let the ML7037-003 out of the initial mode, and it starts normal operation.
OKI Semiconductor
CR6 (Upper Address Write)
CR7 (Lower Address Write)
CR8 (Upper Data Write)
CR9 (LowerData Write)
CR1-B7="1" (Write)
Another Internal Data
Memory Setting?
CR1-B7="0"
Figure 26 Internal Data Memory Access Flow Chart
(Read)
Start
End
No
Yes
No
Yes
* CR1-B7 is automatically cleared
after a completion of a write.
PEDL7037-003-05Zz_Digest
ML7037-003
34/41