msm7580 Oki Semiconductor, msm7580 Datasheet - Page 11

• Manufacturer Part Number: msm7580
• Description: Itu-t G.721 Adpcm Transcoder
• Manufacturer: Oki Semiconductor

THR Processing Timing
CODER
¡ Semiconductor
Timing Block Diagrams, when CODER and DECODER output data, are shown in the following
figures.
The parallel to serial conversion of the output unit employs a load format and the load point is
at the rising edge of a synchronous signal.
Therefore, input THR signal with respect to SYNCA for CODER with timing of satisfying ts and
th conditions shown in the figure.
For DECODER, THR signal should be input even when through-data is input.
The input timing should satisfy the conditions shown in the following figures.
Note: That data-ship may occur when the rising edge (data load point) of SYNCA and input of
Internal Latch timing (A)
ADPCM side SYNC (SYNCA)
Through-data Output (SOA)
Internal Input Data
PCM side SYNC (SYNCP)
PCM Input (SIP)
BCLKA
THR
SYNCP
SIP
BCLKP
THR
the internal latch timing overlap each other.
Parallel
Serial
MSB
8
Latch timing=A
Latch
Through-data
ADPCM
CODER
8b
LSB
4b
Through-data
ts
S
E
L
th
MSB
Parallel
Serial
ts=100ns or more
th=100ns or more
MSM7580
SYNCA
SOA
BCLKA
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