msm7580 Oki Semiconductor, msm7580 Datasheet - Page 14

• Manufacturer Part Number: msm7580
• Description: Itu-t G.721 Adpcm Transcoder
• Manufacturer: Oki Semiconductor

NOTES ON USAGE
¡ Semiconductor
(1) Through Mode (CODER Side)
ADPCM side SYNC (SYNCA)
ADPCM side SYNC (SYNCA)
(2) Through Mode (DECODER Side)
Through-Data Output (SOA)
Through-Data Output (SOA)
ADPCM side SYNC (SYNCA)
Through-Data Output (SOP)
Through-Data Output (SOP)
PCM side SYNC (SYNCP)
PCM side SYNC (SYNCP)
PCM side SYNC (SYNCP)
Internal Latch Timing
Internal Latch Timing
ADPCM Input (SIA)
PCM Input (SIP)
BCLK
BCLK
(A) When SYNCA rises after t1, PCMDATA1 is output to ADPCMDATA1.
(B) When SYNCA rises before t1, PCMDATA1 is output to ADPCMDATA1.
If SYNCA rises near the t1 and jitter occurs, data slip may occur. Therefore SYNCA should not rise in the range of ±500ns from t1.
Data slip means that data is deleted or the same data is output twice.
(A) When SYNCA rises after t1, ADPCMDATA1 is output to PCMDATA1.
(B) When SYNCA rises before t1, ADPCMDATA1 is output to PCMDATA1.
If SYNCP rises near the t1 and jitter occurs, data slip may occur. Therefore SYNCA should not rise in the range of ±500ns from t1.
Data slip means that data is deleted or the same data is output twice.
(A)
(B)
(A)
(B)
1
t0
1
t0
2
2
3
3
ADPCMDATA1
PCMDATA1
ADPCMDATA0
PCMDATA0
4
4
5
5
6
6
7
7
8
8
t1
t1
*t1 is the falling edge of the 8th BCLK counted from t0.
*t1 is the falling edge of the 8th BCLK counted from t0.
ADPCMDATA0
PCMDATA0
ADPCMDATA2
PCMDATA2
ADPCMDATA1
PCMDATA1
ADPCMDATA1
PCMDATA1
ADPCMDATA3
PCMDATA3
ADPCMDATA2
PCMDATA2
MSM7580
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