ml87v2104 Oki Semiconductor, ml87v2104 Datasheet - Page 12

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ml87v2104

Manufacturer Part Number
ml87v2104
Description
Display Controller With Built-in Display Memory And Jpeg
Manufacturer
Oki Semiconductor
Datasheet
2.2 Display Interface
2.2.1 Display Output Format
2.2.2 Output Synchronous Signals
OKI Semiconductor
The TFT-LCD mode or TV mode can be selected as a display output format.
• TFT-LCD mode
• TV mode
[Control Registers]
• DOFMT
• TVSTD
The functions of the output synchronous signals partially vary with the display output format.
CP
LDP1
LDP2
LDP3
LDP4
HST1
HST2
FDP1
FDP2
FDP3
FIDF
DISP
signal
Sync.
: Display format, 1 bit (write/read)
: TV format selection, 3 bits (write/read)
“0”: TFT-LCD mode
“1”: TV mode
“000” : 525i, 27.0 MHz (NTSC equivalent, BT.656)
“001” : 525i, 13.5 MHz (NTSC equivalent, BT.601)
“010” : 525i, 12.272727 MHz (NTSC equivalent, square pixels)
“011” : 525i, 14.31818 MHz (NTSC equivalent, 4fsc)
“100” : 625i, 27.0 MHz (PAL equivalent, BT.656)
“101” : 625i, 13.5 MHz (PAL equivalent, BT.601)
“110” : 625i, 14.75 MHz (PAL equivalent, square pixels)
Note: It is necessary to set the system clock to each frequency described above.
Data clock
Line drive pulse 1
Line drive pulse 2
Line drive pulse 3
Line drive pulse 4
Horizontal start signal 1
Horizontal start signal 2
Frame drive pulse 1
Frame drive pulse 2
Frame drive pulse 3
Current-alternating signal
Display enable
: Progressive scan, output synchronization, variable number of pixels
: Interlace scan, fixed to 525i or 625i
TFT-LCD mode
Function
synchronous signal)
synchronous signal)
HSYNC (horizontal
VSYNC (vertical
Display enable
Field ID signal
Data clock
(Not used)
(Not used)
(Not used)
(Not used)
(Not used)
(Not used)
(Not used)
TV mode
Possible to AND with
Possible to OR with
Pulse width: 1 CP
Pulse width: 1 CP
Remarks
PEDL87V3116-02
LDP4
LDP2
ML87V3116
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