ml86v7668 Oki Semiconductor, ml86v7668 Datasheet - Page 6

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ml86v7668

Manufacturer Part Number
ml86v7668
Description
Ntsc/pal/secam Digital Video Decoder
Manufacturer
Oki Semiconductor
Datasheet

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Pin
30
31
32
33
34
35
36
38
39
42
43
|
|
|
GAINS [3]
GAINS [0]
MODE [3]
MODE [2]
MODE [1]
MODE [0]
DGNDIO
DVDDIO
INSSEL
Symbol
INS [2]
INS [0]
|
|
I/O


I
I
I
I
I
I
Output format external setting pins. Connect these pins to the “ 0”
state when not used.
Valid when register $01/IOC2[0] = “ 0” (default).
MODE[3:2]
“ 00”:
“ 01”:
“ 10”:
“ 11”:
Operating mode determination setting pin. Connect this pin to the “ 0”
state when not used.
“ 0” : NTSC/PAL automatic determination
“ 1” : NTSC/PAL/SECAM automatic determination
“ 0” : ITU-R BT.601, “ 1” : Square Pixel
The Square Pixel supports only NTSC.
Digital IO power supply
Digital IO ground
Amplifier gain external setting pins. Connect these pins to the "0"
state when not used.
Valid when external pin 43 INSSEL = 0.
INS[2:0]
Amplifier gain external setting pins. Connect these pins to the “ 0”
state when not used.
Valid when external pin 43 INSSEL = 0.
GAINS [2:0]
Amplifier gain setting and input pin switch setting control select pin
The internal register setting is invalid when the external pin mode is
set.
[000]
[001]
[010]
[011]
[100]
[101]
[110]
[111]
0: External pin mode
1: Register mode
ITU-R BT.656:
8-bit Y/CbCr:
16-bit Y/CbCr:
18-bit RGB:
Amplifier gain setting: Pins 39 to 42 GAINS[3:0] are used
Input pin setting: Pins 36 to 38 INS[2:0]) are used
Amplifier gain setting: Register $69/ADC2[5:0]
Input pin setting: Register $68/ADC1[2:0]
VIN1(pin 8) Composite-1
VIN2(pin 10) Composite-2
VIN3(pin 11) Composite-3
VIN4(pin 12) Composite-4
VIN2(pin 10) Y-1
VIN5(pin 14) C-1
VIN3(pin 11) Y-2
VIN6(pin 15) C-2
VIN4(pin 12) Y-3
VIN7(pin 16) C-3
Prohibited setting (ADC enters sleep mode)
Gain (X times)
Input pin
8 bits (YCbCr)
8 bits (YCbCr) + Sync.
8 bits (Y) + 8 bits (CbCr) + Sync.
6 bits (R) + 6 bits (G) + 6 bits (B) + Sync.
Description
PEDL86V7668-01
ML86V7668
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