le57d111 Zarlink Semiconductor, le57d111 Datasheet - Page 6

• Manufacturer Part Number: le57d111
• Description: Dual Subscriber Line Interface Circuit
• Manufacturer: Zarlink Semiconductor

ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Stresses greater than those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device reliability
Notes:
1.
2.
Package Assembly
The green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. The peak soldering temperature should not exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
Operating Ranges
Legerity guarantees the performance of this device over commercial (0 to 70º C) and industrial (-40 to 85ºC) temperature ranges
by conducting electrical characterization over each range and by conducting a production test with single insertion coupled to
periodic sampling. These characterization and test procedures comply with section 4.6.2 of Bellcore GR-357-CORE Component
Reliability Assurance Requirements for Telecommunications Equipment.
Thermal limiting circuitry on the chip will shut down the circuit at a junction temperature of about 165ºC. Continuous operation above 145ºC
junction temperature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Refer to the Thermal
Management for the Le5711 and Le5712 Dual SLIC Devices Application Note for details.
Storage temperature
V
V
BGND
A
to BGND:
Current from A
DB
C1
Input Voltage
Maximum power dissipation, continuous:
T
Thermal Data (Junction to Ambient):
Thermal Data (Junction to Case):
ESD Immunity (Human Body Model)
A
CC
BAT
1
1
(TIP), A
1
= 70º C, No heat sink
, C2
Continuous
10 ms (F = 0.1 Hz)
1 µs (F = 0.1 Hz)
250 ns (F = 0.1 Hz)
, DB
Voltage on ring-trip inputs
Current into ring-trip inputs
In 32-pin PLCC package
In 44-pin eTQFP
In 32-pin PLCC package
In 44-pin eTQFP package
In 32-pin PLCC package
In 44-pin eTQFP package
with respect to AGND
with respect to AGND
1
, BGND
1
2
, C1
, and DAC inputs:
2
(TIP), B
2
, C2
1
2
(TIP), A
with respect to AGND
2
1
(RING), B
2
(TIP), B
Zarlink Semiconductor Inc.
2
(RING) with respect
1
(RING), B
6
2
(RING)
–55 to +150º C
–0.4 to +7.0 V
+0.4 to –61V
+3 to –3 V
V
–70 to +5 V
–80 to +8 V
–90 to +12 V
±150 mA
V
±10 mA
–0.4 to V
1.7 W
(see note 1)
θ
43ºC/W typ
(see note 2)
θ
16ºC/W typ
(see note 2)
JESD22 Class 1C compliant
JA
JC
BAT
BAT
to + 1 V
to 0 V
CC
+ 0.4 V