zl30102 Zarlink Semiconductor, zl30102 Datasheet - Page 22

• Manufacturer Part Number: zl30102
• Description: T1/e1 Stratum 4/4e Redundant System Clock Synchronizer For Ds1/e1 And H.110
• Manufacturer: Zarlink Semiconductor

4.4.4
The Automatic mode combines the functionality of the Normal mode (automatic Holdover) with automatic reference
switching. The automatic reference switching is described in more detail in section 4.5.2, “Automatic Reference
Switching“.
4.5
4.5.1
In the manual modes of operation (MODE_SEL1:0 ≠ 11) the active reference input (REF0, REF1 or REF2) is
selected by the REF_SEL1 and REF_SEL0 pins as shown in Table 5. When the logic value of the REF_SEL pins is
changed when the DPLL is in Normal mode, the ZL30102 will perform a hitless reference switch.
When the REF_SEL inputs are used in Normal mode to force a change from the currently selected reference to
another reference, the action of the LOCK output will depend on the relative frequency and phase offset of the old
and new references. Where the new reference has enough frequency offset and/or TIE-corrected phase offset to
force the output outside the phase-lock-window, the LOCK output will de-assert, the lock-qualify timer is reset, and
LOCK will stay de-asserted for the full lock-time duration. Where the new reference is close enough in frequency
and TIE-corrected phase for the output to stay within the phase-lock-window, the LOCK output will remain asserted
through the reference-switch process.
Reference Switching
REF_SEL
LOCK
Note: LOCK pin behaviour depends on phase and frequency offset of REF1.
Automatic Mode
Manual Reference Switching
REF_SEL1
0
0
1
1
Figure 12 - Reference Switching in Normal Mode
REF0
Table 5 - Manual Reference Selection
REF_SEL0
REF1
Zarlink Semiconductor Inc.
0
1
0
1
ZL30102
Lock Time
22
Input Reference Selected
REF0
REF1
REF2
REF2
Data Sheet