zl30109 Zarlink Semiconductor, zl30109 Datasheet - Page 23

no-image

zl30109

Manufacturer Part Number
zl30109
Description
Ds1/e1 System Synchronizer With 19.44 Mhz Output
Manufacturer
Zarlink Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
zl30109QDG1
Manufacturer:
ZARLINK
Quantity:
248
The presence of input jitter makes it difficult to define when the PLL is locked as it may not be able to align its output
to the input within the required phase distance, dependent on the PLL bandwidth and the input jitter amplitude and
frequency.
Although a short lock time is desirable, it is not always possible to achieve due to other synchronizer requirements.
For instance, better jitter transfer performance is achieved with a lower frequency loop filter which increases lock
time. And better (smaller) phase slope performance (limiter) results in longer lock times.
6.0
This section contains ZL30109 application specific details for power supply decoupling, reset operation, clock and
crystal operation.
6.1
Jitter levels on the ZL30109 output clocks may increase if the device is exposed to excessive noise on its power
pins. For optimal jitter performance, the ZL30109 device should be isolated from noise on power planes connected
to its 3.3V and 1.8V supply pins. For recommended common layout practices, refer to Zarlink Application Note
ZLAN-178.
6.2
The ZL30109 can use either a clock or crystal as the master timing source. Zarlink application note ZLAN-68 lists a
number of applicable oscillators and crystals that can be used with the ZL30109.
6.2.1
When selecting a clock oscillator, numerous parameters must be considered. This includes absolute frequency,
frequency change over temperature, phase noise, output rise and fall times, output levels and duty cycle.
The output clock should be connected directly (not AC coupled) to the OSCi input of the ZL30109, and the OSCo
output should be left open as shown in Figure 12.
Power Supply Decoupling
Master Clock
Applications
Clock Oscillator
1
2
3
4
Table 6 - Typical Clock Oscillator Specification
Frequency
Tolerance
Rise & fall time
Duty cycle
ZL30109
Figure 12 - Clock Oscillator Circuit
OSCo
Zarlink Semiconductor Inc.
OSCi
No Connection
ZL30109
23
20 MHz OUT
20 MHz
as required
< 10 ns
40% to 60%
+3.3 V
+3.3 V
GND
0.1 µF
Data Sheet

Related parts for zl30109