mt9079apr1 Zarlink Semiconductor, mt9079apr1 Datasheet - Page 35

• Manufacturer Part Number: mt9079apr1
• Description: Advanced Controller For E1
• Manufacturer: Zarlink Semiconductor

7 - 4
1 - 0
7 - 0
Bit
Bit
3
2
TMA1-4
Name
X2, X3
(0000)
SOFF7
SOFF0
Name
(1 1)
(00H)*
X1
(1)
(1)
Y
-
Transmit Multiframe Alignment Bits One to Four. These bits are transmitted on the PCM 30
2048 kbit/sec. link in bit positions one to four of time slot 16 of frame zero of every signalling
multiframe. These bits are used by the far end to identify specific frames of a signalling multi-
frame. TMA1-4 = 0000 for normal operation.
This bit is transmitted on the PCM 30 2048 kbit/sec. link in bit position five of time slot 16 of
frame zero of every multiframe. This bit is normally set to one.
This bit is transmitted on the PCM 30 2048 kbit/sec. link in bit position six of time slot 16 of
frame zero of every multiframe. It is used to indicate the loss of multiframe alignment to the
remote end of the link. If one - loss of multiframe alignment; if zero - multiframe alignment
acquired. This bit is ignored when
These bits are transmitted on the PCM 30 2048 kbit/sec. link in bit positions seven and eight
respectively, of time slot 16 of frame zero of every multiframe. These bit are normally set to
one.
ST-BUS Offset Control. This register controls the offset, in bits, between the input and output
ST-BUS control and data streams. The input streams are always aligned with F0i and the
output streams may be delayed by as much as 255 bits.
Table 28 - Transmit MF Alignment Signal
Table 29 - ST-BUS Offset Control Word
(Page 1, Address 14H)
(Page 1, Address 13H)
Zarlink Semiconductor Inc.
MT9079
35
Functional Description
Functional Description
AUTY
is zero (page 1, address 11H).
Data Sheet