zl50405 Zarlink Semiconductor, zl50405 Datasheet - Page 107

• Manufacturer Part Number: zl50405
• Description: Managed5-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

12.3.9.13
Accessed by CPU (R/W)
W0 – QOSC28[5:0] – CREDIT_C00 (CPU Address 89C)
W1 – QOSC29[5:0] – CREDIT_C01 (CPU Address 89D)
W2 – QOSC30[5:0] – CREDIT_C02 (CPU Address 89E)
W3 – QOSC31[5:0] – CREDIT_C03 (CPU Address 89F)
QOSC28 through QOSC31 represents one set of WFQ parameters for MMAC port. The granularity of the numbers
is 1, and their sum must be 64. QOSC31 corresponds to W3 that is the highest priority, and QOSC27 corresponds
to W0. Default scheduling method will be strict priority across all queues. Only when the bit 7 in the class is set, the
queue will be scheduled as WFQ. The credit number also works as shaper credit if bit 6 is set. The queue with
shaper enabled will be scheduled by strict priority when the token is available. The shaper setting override the NS
setting.
12.3.9.14
Accessed by CPU (R/W)
W0 – QOSC36[7:0] – TOKEN_LIMIT_C00 (CPU Address 8A4)
W1 – QOSC37[7:0] – TOKEN_LIMIT_C01 (CPU Address 8A5)
W2 – QOSC38[7:0] – TOKEN_LIMIT_C02 (CPU Address 8A6)
W3 – QOSC39[7:0] – TOKEN_LIMIT_C03 (CPU Address 8A7)
QOSC36 through QOSC39 represents one set of token limit on the shaper of MMAC port. The granularity of the
numbers is 64 bytes. The shaper is implemented as leaky bucket and the limit here works as bucket size. Since the
hardware implementation can keep negative number, the limit can be as small as one and still can transmit
oversized frame, as long as one byte token is available.
12.3.10
NOTE: Device Manufacturing test registers.
12.3.10.1
CPU Address E00
Accessed by CPU (R/W)
Test group selection for testout[7:0].
12.3.10.2
CPU Address E01
Accessed by CPU (R/W)
Test group selection for testout[15:8].
Bits [5:0]:
Bit [6]:
Bit [7]:
(Group E Address) System Diagnostic
QOSC28 - QOSC31 - Classes WFQ Credit For MMAC
QOSC36 - QOSC39 - Shaper Control Port MMAC
DTSRL – Test Output Selection
DTSRM – Test Output Selection
Class scheduling credit
Shaper enable
Not strict priority apply
Zarlink Semiconductor Inc.
ZL50405
107
Data Sheet