am79c970 Advanced Micro Devices, am79c970 Datasheet - Page 102

• Manufacturer Part Number: am79c970
• Description: Pcnettm-pci Single-chip Ethernet Controller For Pci Local Bus
• Manufacturer: Advanced Micro Devices

CSR60: Previous Transmit Descriptor
Address Lower
Bit
31–16 RES
15–0 PXDAL
CSR61: Previous Transmit Descriptor
Address Upper
Bit
31–16 RES
15–0 PXDAU
CSR62: Previous Transmit Byte Count
Bit
31–16 RES
15–12 RES
11–0
CSR63: Previous Transmit Status Count
Bit
31–16 RES
PXBC
Name
Name
Name
Name
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
previous TDRE address pointer.
PCnet-PCI controller has the ca-
pability to stack multiple transmit
frames.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
S_RESET or STOP.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
previous TDRE address pointer.
PCnet-PCI controller has the ca-
pability to stack multiple transmit
frames.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
S_RESET or STOP.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Reserved locations. Read and
written as ZERO.
Accessible only when STOP bit is
set.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the previous
transmit descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
S_RESET or STOP.
Description
Reserved locations. Written as
ZEROs and read as undefined.
by
by
by
H_RESET,
H_RESET,
H_RESET,
P R E L I M I N A R Y
Am79C970
15–8
7–0
CSR64: Next Transmit Buffer Address Lower
Bit
31–16 RES
15–0 NXBAL
CSR65: Next Transmit Buffer Address
Upper
Bit
31–16 RES
15–0 NXBAU
CSR66: Next Transmit Byte Count
Bit
31–16 RES
15–12 RES
11–0
NXBC
PXST
Name
Name
Name
RES
Previous Transmit Status. This
field is a copy of bits 31–24 of
TMD1 of the previous transmit
descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
S_RESET or STOP.
Reserved locations. Read and
written as ZERO.
Accessible only when STOP bit is
set.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
next transmit buffer address from
which the PCnet-PCI controller
will transmit an outgoing frame.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
S_RESET or STOP.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
next transmit buffer address from
which the PCnet-PCI controller
will transmit an outgoing frame.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
S_RESET or STOP.
Description
Reserved locations. Written as
ZEROs and read as undefined.
Reserved locations. Read and
written as ZERO.
Accessible only when STOP bit is
set.
Next Transmit Byte Count. This
field is a copy of the BCNT field of
TMD1 of the next transmit de-
scriptor.
by
by
by
H_RESET,
H_RESET,
H_RESET,
AMD
1-969