am79c972b Advanced Micro Devices, am79c972b Datasheet - Page 125

• Manufacturer Part Number: am79c972b
• Description: Pcnet?-fast+ Enhanced 10/100 Mbps Pci Ethernet Controller With Onnow Support
• Manufacturer: Advanced Micro Devices

CSR34: Current Transmit Descriptor Address
Lower
Bit
31-16
15-0
CSR35: Current Transmit Descriptor Address
Upper
Bit
31-16
15-0
CSR36: Next Next Receive Descriptor Address
Lower
Bit
31-16
15-0
Name
RES
CXDAL
Name
RES
CXDAU
Name
RES
NNRDAL
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Reserved locations. Written as
zeros and read as undefined.
Contains the lower 16 bits of the
current transmit descriptor ad-
dress pointer.
Description
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
current transmit descriptor ad-
dress pointer.
Description
Reserved locations. Written as
zeros and read as undefined.
Contains the lower 16 bits of the
next next receive descriptor ad-
dress pointer.
Am79C972
CSR37: Next Next Receive Descriptor Address
Upper
Bit
31-16 RES
15-0
CSR38: Next Next Transmit Descriptor Address
Lower
Bit
31-16 RES
15-0
CSR39: Next Next Transmit Descriptor Address
Upper
Bit
31-16 RES
15-0
Name
NNRDAU
Name
NNXDAL
Name
NNXDAU
zeros and read as undefined.
next next receive descriptor ad-
dress pointer.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
zeros and read as undefined.
next next transmit descriptor ad-
dress pointer.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
zeros and read as undefined.
next next transmit descriptor ad-
dress pointer.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
Reserved locations. Written as
Contains the upper 16 bits of the
Description
Reserved locations. Written as
Contains the lower 16 bits of the
Description
Reserved locations. Written as
Contains the upper 16 bits of the
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