trcv012g5 ETC-unknow, trcv012g5 Datasheet - Page 5

• Manufacturer Part Number: trcv012g5
• Description: Trcv012g5 Gbits/s Trcv012g7 Gbits/s Gbits/s Limiting Amplifier, Clock Recovery, Data Demultiplexer
• Manufacturer: ETC-unknow

Preliminary Data Sheet
August 2000
Pin Information
Note: In Table 1, when operating the TRCV012G7 device at the OC-48/STM-16 rate, 2.5 Gbits/s should be inter-
Table 1. Pin Descriptions—2.5 Gbits/s and Related Signals
* Differential pins are indicated by the P and N suffixes. For nondifferential pins, N at the end of the symbol name designates active-low.
† I = input, O = output. I
Lucent Technologies Inc.
resistance of 50
122
118
123
119
120
121
Pin
30
32
50
51
53
54
41
40
28
34
26
25
18
17
19
16
preted as 2.48832 Gbits/s. When operating the TRCV012G7 device at the RS FEC OC-48/STM-16 rate,
2.5 Gbits/s should be interpreted as 2.66606 Gbits/s. (A similar interpretation should be made for 2.5 GHz.)
MUTE2G5N
ENCK2G5N
PRG_LOSA
END2G5N
Symbol*
CK2G5N
CK2G5P
INLOSN
LOSAN
LOSDN
D2G5P
D2G5N
RREF1
RREF2
SLADJ
LAINP
LAINN
VTHP
VTHN
VCP
VCN
LFP
LFN
on this pin.
u
= an internal pull-up resistor on this pin, I
(continued)
Type
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
u
u
u
u
†
Open Drain Loss of Analog Signal (Active-Low).
Open Drain Loss of Digital Data (Active-Low).
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
CMOS
CMOS
CMOS
CMOS
Level
CML
CML
Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer
Limiting Amplifier Inputs (2.5 Gbits/s).
ac coupling required.
Data Output (2.5 Gbits/s NRZ). 2.5 Gbits/s differential data
output.
Enable D2G5P/N Data Outputs (Active-Low).
0 = D2G5P/N buffer enabled
1 or no connection = D2G5P/N buffer powered off
Mute D2G5P/N Data Output (Active-Low).
0 = muted
1 or no connection = normal data
Recovered Clock Output (2.5 GHz). 2.5 GHz recovered differen-
tial clock output. Pins are high impedance when ENCK2G5N = 1.
Enable CK2G5P/N Clock Output (Active-Low).
0 = CK2G5P/N buffer enabled
1 or no connection = CK2G5P/N buffer powered off
Resistor Reference 1. CML current bias reference resistor. (See
Table 16, page 22 for values.)
Resistor Reference 2. CML bias reference resistor. Place a
1.5 k
Voltage Threshold Adjust Input. This input is for monitoring
purposes only and should be left open (see Figure 3 on page 10).
Slice Level Adjustment. Adjusts slice level for the limiting amp
(see Figure 3 on page 10).
Programming Voltage for LOSA Threshold. Programming
voltage is scaled (see Figure 7 on page 16).
Input Loss of Signal (Active-Low). Forces VCO to decrease to
its minimum frequency.
0 = force VCO low
1 or no connection = normal operation
Loop Filter PLL. Connect LFP to VCP, and LFN to VCN.
VCO Control. Connect VCP to LFP, and VCN to LFN.
Pins are high impedance when END2G5N = 1.
Pins are active but forced to differential logic low when
MUTE2G5N = 0.
resistor to V
d
= an internal pull-down resistor on this pin, I
CCD
Name/Description
.
TRCV012G5 and TRCV012G7
t
= an internal termination
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