uaa3580 NXP Semiconductors, uaa3580 Datasheet - Page 18

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uaa3580

Manufacturer Part Number
uaa3580
Description
Wideband Code Division Multiple Access Frequency Division Duplex Zero If Receiver
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
15 SERIAL BUS TIMING CHARACTERISTICS
V
2002 Oct 30
handbook, full pagewidth
Serial clock; pin CLK
t
t
T
Enable; pin EN
t
t
t
t
Register serial input data; pin DATA
t
t
CCA
i(r)
i(f)
d(START)
d(END)
W
su;EN
su;DATA
h;DATA
cyc
Wideband code division multiple access
frequency division duplex zero IF receiver
SYMBOL
= 2.6 V; V
DATA
CLK
EN
CCA(CP)
t d(START)
input rise time
input fall time
clock period
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock
input data to clock set-up time
input data to clock hold time
t su;DAT
MSB
= 2.6 V; V
DDD
t h;DAT
= 1.6 V; T
PARAMETER
Fig.3 Serial bus timing diagram.
amb
= 25 C; unless otherwise specified.
T cyc
18
t i(f)
LSB
t i(r)
67
200
100
400
200
25
25
MIN.
ADDRESS
t d(END)
TYP.
Objective specification
20
20
MAX.
UAA3580
t W
MGU575
t su;EN
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT

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