am85c30 Advanced Micro Devices, am85c30 Datasheet - Page 68
am85c30
Manufacturer Part Number
am85c30
Description
Enhanced Serial Communications Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM85C30.pdf
(68 pages)
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Am85C30 HARDWARE RESET
IN SOFTWARE
In the absence of a hardware logic or a Power-On-Reset
mechanism, the following procedure should be used to
ensure that the ESCC is properly reset.
1. Power Up
2. Read RR0
3. Read RR1
4. Write a C0h to WR9
5. Read RR0
6. Read RR1
7. Write ‘a value’ to Write Register 2
8. Read RR2
If RR2 = WR2, in steps 7 and 8, then the ESCC is prop-
erly reset.
(Dummy Read)
(Dummy Read)
(Hardware Reset)
(Should expect binary
01XXX100 = typically
‘44h’)
(Should expect binary
0X000110 = typically
‘06h’)
(Should get ‘a value’)
A M E N D M E N T
Am85C30
Note: For hardware reset only steps 1 through 4 are
needed; steps 5 through 8 are mentioned simply for
confirmation. Also, this procedure is applicable to only
the first time hardware reset. Any subsequent chip
reset can be achieved by simply writing a ‘C0’
to WR9.
For further information refer to the Technical Manual
PID # 07513D.
AMD
15