lrs1331 Sharp Microelectronics of the Americas, lrs1331 Datasheet - Page 17

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lrs1331

Manufacturer Part Number
lrs1331
Description
Stacked Chip Flash Memory Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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Stacked Chip (16M Flash & 4M SRAM)
RESET OPERATIONS
NOTES:
1. If F-RP is asserted while a block erase or word write operation is not executing,
2. A reset time t
3. When the device power-up, holding F-RP LOW minimum 100 ns is required after V
Data Sheet
F-RP Pulse LOW Time (if F-RP is tied to V
specification is not applicable).
F-RP LOW to Reset during Block Erase or Word Write
F-V
T
the reset will complete with 100 ns.
in predefined range and also has been stable there.
A
CC
= -25°C to +85°C, V
2.7 V to F-RP HIGH
F-RY/BY (R)
F-RY/BY (R)
PHQV
F-RP (P)
F-RP (P)
F-RP (P)
F-V
is required from F-RY/BY going HIGH Z, or F-RP going HIGH until outputs are valid.
CC
PARAMETER
HIGH Z
HIGH Z
2.7 V
V
V
CC
V
V
V
V
V
V
V
OL
OL
IH
IH
IL
IL
IL
IH
IL
= 2.7 V to 3.6 V
Figure 7. AC Waveform for Reset Operation
CC
t
t
PLPH
PLPH
, this
A. Reset During Read Array Mode
B. Reset During Block Erase or Word Byte Write
C. F-RP Rising Timing
t
VPH
SYMBOL
t
PLRZ
t
t
t
PLPH
PLRZ
VPH
CC
MIN.
100
100
has been
MAX.
20
UNIT
ns
µs
ns
NOTES
1, 2
3
LRS1331
1331-7
17

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