lrs1331 Sharp Microelectronics of the Americas, lrs1331 Datasheet - Page 22

• Manufacturer Part Number: lrs1331
• Description: Stacked Chip Flash Memory Sram
• Manufacturer: Sharp Microelectronics of the Americas

LRS1331
22
1. A write occurs during the overlap of a LOW S-CE
2. t
3. t
4. t
5. t
NOTES:
and S-WE going LOW. A write ends at the earliest transition among S-CE
S-CE
write to the end of write.
A write begins at the latest transition among S-CE
of write.
as S-CE
CW
BW
AS
WR
S-UB, S-LB
is measured from the address valid to the beginning of write.
is measured from the later of S-CE
is measured from the time of going LOW S-UB or LOW S-LB to the end of write.
is measured from the end of write to the address change. t
ADDRESS
2
going LOW and S-WE going HIGH. t
1
S-CE
S-CE
S-WE
S-OE
going HIGH, S-CE
D
D
OUT
IN
2
1
Figure 11. Write Cycle Timing Diagram (S-UB, S-LB Control)
2
going LOW or S-WE going HIGH.
1
(NOTE 4)
going LOW or S-CE
t
AS
WP
is measured from the beginning of
1
1
, a HIGH S-CE
going LOW, S-CE
HIGH IMPEDANCE
2
going HIGH to the end
WR
2
t
and a LOW S-WE,
(NOTE 1)
AW
applied in case a write ends
t
2
WP
going HIGH
t
WC
(NOTE 2)
1
(NOTE 3)
going HIGH,
t
t
CW
BW
Stacked Chip (16M Flash & 4M SRAM)
t
DW
Data Valid
(NOTE 5)
(NOTE 5)
t
t
WR
WR
t
DH
Data Sheet
1331-11