mt16vddf6464hy-40b Micron Semiconductor Products, mt16vddf6464hy-40b Datasheet - Page 10

• Manufacturer Part Number: mt16vddf6464hy-40b
• Description: 512mb, 1gb X64, Dr Pc3200 200-pin Ddr Sodimm
• Manufacturer: Micron Semiconductor Products

Table 11:
Capacitance
PDF: 09005aef80b57837/Source: 09005aef80b577fa
DDAF16C64_128x64H.fm - Rev. E 10/06 EN
Parameter/Condition
Operating current: One device bank; Active-Precharge;
t
Address and control inputs changing once every two clock cycles
Operating current: One device bank; Active-Read-Precharge; Burst = 4;
t
changing once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks are idle;
(MIN);
cycle. V
Active power-down standby current: One device bank active; Power-
down mode;
Active standby current: CS# = HIGH; CKE = HIGH;
active
twice per clock cycle; Address and other control inputs changing once per
clock cycle
Operating current: Burst = 2;
active; Address and control inputs changing once per clock cycle;
(MIN);
Operating current: Burst = 2; Writes; Continuous burst; One device
bank
t
Auto refresh burst current:
Self refresh current: CKE ≤ 0.2V
Operating current: Four device bank interleaving READs
auto precharge,
control inputs change only during Active READ, or WRITE commands
CK =
RC =
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
;
t
active; Address and control inputs changing once per clock cycle;
t
CK (MIN); DQ, DM and DQS inputs changing once per clock cycle;
RC (MIN);
I
CKE = HIGH; Address and other control inputs changing once per clock
t
OUT
IN
RC =
= V
= 0mA
t
I
0°C ≤ T
REF
RAS (MAX);
t
DD
CK =
t
for DQ, DQS, and DM
RC = minimum
t
Specifications and Conditions – 1GB
CK =
Notes:
t
A
CK (MIN); CKE = LOW
t
CK =
≤ +70°C; V
t
CK (MIN); I
t
CK =
t
1. a: Value calculated as one module rank in this operating condition, and all other module
Micron encourages designers to simulate the performance of the module to achieve
optimum values. When inductance and delay parameters associated with trace lengths
are used in simulations, they are significantly more accurate and realistic than a gross
estimation of module capacitance. Simulations can then render a considerably more
accurate result. JEDEC modules are now designed by using simulations to close timing
budgets.
CK (MIN);
ranks are calculated in I
b: Value calculated reflects all module ranks in this operating condition.
t
CK (MIN); DQ, DM and DQS inputs changing
DD
t
Reads; Continuous burst; One device bank
RC allowed;
, V
OUT
DD
CKE = (LOW)
= 0mA; Address and control inputs
Q = +2.6V ±0.1V
t
CK =
512MB, 1GB: (x64, DR) PC3200 200-Pin DDR SODIMM
t
CK (MIN); Address and
DD
One device bank
t
t
REFC =
REFC = 7.8125µs
2
P
10
(CKE LOW) mode.
t
RC =
(Burst = 4) with
t
RFC (MIN)
t
t
CK =
CK =
t
RC (MIN);
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
t
CK
CK =
CK
Symbol
I
I
I
I
I
I
I
DD4W
I
I
DD3N
DD4R
I
DD5A
I
I
DD2P
DD2F
DD3P
DD0
DD1
DD5
DD6
DD7
Electrical Specifications
1,280
1,520
1,560
1,600
5,520
3,640
Max
-40B
880
720
960
176
©2004 Micron Technology, Inc. All rights reserved.
80
80
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
15, 18,
15, 18,
Notes
14, 25
14, 25
14, 25
14, 27
16, 27
14, 26
27
28
27
14
9