k9f1208u0c Samsung Semiconductor, Inc., k9f1208u0c Datasheet - Page 31

• Manufacturer Part Number: k9f1208u0c
• Description: Flash Mem Parallel 3.3v 512m-bit 64m X 8 48-pin Tsop-i T/r
• Manufacturer: Samsung Semiconductor, Inc.

Three commands are provided to protect the block.
BLOCK PROTECT
Each block is protected from programming and erasing, controlled by the protect flag written in a specified area in the block. Block
Proctect opreation is initiated by wirting 4xh-80h-10h to the command register along with four address cycles. Only address A
A
Register command may be entered, with RE and CE low, to read the status register. The system controller can detect the completion
of Page Program operation for protecting a block by monitoring the R/B output, or the Status bit(I/O 6) of the Status Register. Only the
Read Status command and Reset command are valid while Block Protect operation is in progress. But, if Reset command is inputted
while Block Protect operation is in progress, the block will not be guaranteed whether it is protected or not. When the Page Program
operation for protecting a block is completed, the Write Status Bit(I/O 0) may be checked(Figure 13). The command register remains
in Read Status command mode until another valid command is written to the command register.
When programming is prohibited by 41h command, the protect flag and the data of protected block can be erased by Block Erase
operation. Once erasing is prohibited by 42h/43h command, the protect flag and the data of protected block can not be erased. If
80h-10h is written to command register along with four address cycles at the program protected block or at the program/erase pro-
tected block, and if 60h-D0h is written to command register along with three address cycles at the program/erase protected block,
the R/B pin changes to low for tR. The Block Protect operation must not be excuted on the aleady protected block. The Block Protect
operation will be aborted by Reset command(FFh). The Block Protect operation can only be used from first block to 200th block.
The device contains a Status Register which may be used to read out the state of the selected block. After writing 7Ah command to
the command register, a read cycle outputs the content of the Status Register to the I/O pins on the falling edge of CE or RE, which-
ever occurs last(Figure 14). Refer to table 3 for specific Status Register definitions. The command register remains in Status Read
mode until further commands are issued to it.
K9F1208U0C
K9F1208R0C
Figure 13. Block Protect Operation
R/B
I/O
26
X
is valid while A
4Xh
41h : Programming is prohibited
42h : Erasing is prohibited
43h : Both programming and erasing are prohibited
0
to A
K9F1208B0C
80h
13
is fixed as 00h. The data must not be loaded. Once the Block Protect opreation starts, the Read Status
Address Input(4Cycle)
A
A
14
A
9
0
~ A
~ A
~ A
25
13
7
: 0 to 4095
: 00h Fix
: 00h Fix
10h
31
t
PROG
70h
I/O
FLASH MEMORY
0
Fail
Pass
FFh
FFh
14
to