k9f1208u0c Samsung Semiconductor, Inc., k9f1208u0c Datasheet - Page 8

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k9f1208u0c

Manufacturer Part Number
k9f1208u0c
Description
Flash Mem Parallel 3.3v 512m-bit 64m X 8 48-pin Tsop-i T/r
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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Figure 2. K9F1208X0C ARRAY ORGANIZATION
K9F1208U0C
K9F1208R0C
Figure 1. K9F1208X0C FUNCTIONAL BLOCK DIAGRAM
V
V
(=4,096 Blocks)
CC
SS
128K Pages
NOTE : Column Address : Starting Address of the Register.
2nd Cycle
3rd Cycle
1st Cycle
4th Cycle
CE
RE
WE
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
Command
* A
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
A
A
8
9
0
K9F1208B0C
is set to "Low" or "High" by the 00h or 01h Command.
- A
- A
1st half Page Register
(=256 Bytes)
25
7
I/O 0
A
A
A
A
17
25
0
9
& High Voltage
Page Register
CLE ALE
Control Logic
512Bytes
512 Bytes
I/O 1
Command
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Generator
A
A
A
Register
*L
10
18
1
2nd half Page Register
(=256 Bytes)
A
I/O 2
8
WP
A
A
A
*L
11
19
2
I/O 3
A
A
A
16 Bytes
16 Bytes
*L
12
20
3
I/O 4
8
A
A
A
*L
13
21
4
I/O 0 ~ I/O 7
(512 + 16)Bytes x 131,072
Global Buffers
I/O 5
Page Register & S/A
A
A
I/O Buffers & Latches
A
*L
512M + 16M Bits
14
22
5
NAND Flash
8 bits
Y-Gating
ARRAY
1 Block = 32 Pages
1 Page = 528 Bytes
1 Block = 528 Bytes x 32 Pages
1 Device = 528Bytes x 32Pages x 4,096 Blocks
I/O 6
A
A
A
*L
15
23
6
= (16K + 512) Bytes
= (16K + 512) Bytes
= 528 Mbits
I/O 7
A
A
A
*L
16
24
7
Output
Driver
FLASH MEMORY
Column Address
Row Address
(Page Address)
V
V
CC
SS
I/0 0
I/0 7

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