hys64t128020edl Qimonda, hys64t128020edl Datasheet - Page 36
![no-image](/images/manufacturer_photos/0/5/549/qimonda_sml.jpg)
hys64t128020edl
Manufacturer Part Number
hys64t128020edl
Description
200-pin Small-outlined Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T128020EDL.pdf
(43 pages)
Rev. 1.12, 2007-10
10312006-I253-V1V0
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
Description
t
Module Density per Rank
t
t
t
t
t
t
t
Analysis Characteristics
t
t
t
t
t
t
PLL Relock Time
T
Psi(T-A) DRAM
∆
∆
∆
∆
∆
∆
∆
∆
∆
Psi(ca) PLL
Psi(ca) REG
∆
∆
SPD Revision
RAS.MIN
AS.MIN
AH.MIN
DS.MIN
DH.MIN
WR.MIN
WTR.MIN
RTP.MIN
RC
RC.MIN
RFC.MIN
CK.MAX
DQSQ.MAX
QHS.MAX
CASE.MAX
T
T
T
T
T
T
T
T
T
T
T
0
2N
2P
3N
3P.fast
3P.slow
4R
5B
7
PLL
REG
and
(DT0)
(DT7)
(DT2N, UDIMM) or ∆
(DT2P)
(DT3N)
(DT4R) / ∆
(DT5B)
(DTPLL)
and
and
[ns]
[ns]
[ns]
(DTREG) / Toggle Rate
[ns]
[ns]
[ns]
[ns]
[ns]
t
[ns]
(DT3P fast)
[ns]
RFC
(DT3P slow)
[ns]
Delta / ∆
t
t
CS.MIN
CH.MIN
Extension
T
4R4W
[ns]
[ns]
T
4R4W
Sign (DT4R4W)
Delta
T
2Q
(DT2Q, RDIMM)
36
HYS64T128020EDL–3.7–B
1 GByte
×64
2 Ranks (×16)
PC2–4200S–444
Rev. 1.2
HEX
2D
80
25
37
10
22
3C
1E
1E
00
06
3C
7F
80
1E
28
00
59
60
3F
2A
2B
20
35
21
40
22
31
00
00
00
00
12
Small Outlined DDR2 SDRAM Modules
HYS64T128020EDL–[2.5/3S/3.7]–B
Internet Data Sheet