hys64t128020edl Qimonda, hys64t128020edl Datasheet - Page 4
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hys64t128020edl
Manufacturer Part Number
hys64t128020edl
Description
200-pin Small-outlined Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T128020EDL.pdf
(43 pages)
1.2
The Qimonda HYS64T128020EDL–[2.5/3S/3.7]–B module
family are small-outline DIMM modules “SO-DIMMs” with 50
mm42 mm30 mm height based on DDR2 technology. DIMMs
are available as non-ECC modules in128M × 64 (1GB) in
organization and density, intended for mounting into 200-pin
connector sockets.
1) For detailed information regarding Product Type of Qimonda please see chapter "Product Type Nomenclature" of this datasheet.
2) The Compliance Code is printed on the module label and describes the speed grade, for example "PC2–6400S–666–12–A0" where 6400S
1) Green Product
2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.
Rev. 1.12, 2007-10
10312006-I253-V1V0
Product Type
PC2-6400-666
HYS64T128020EDL–2.5–B
PC2-5300-555
HYS64T128020EDL–3S–B
PC2-4200-444
HYS64T128020EDL–3.7–B
DIMM
Density
1GB
Product Type
HYS64T128020EDL
means Small-Outline DIMM modules with 6.40 GB/sec Module Bandwidth and "666–12" means Column Address Strobe (CAS) latency
=6, Row Column Delay (RCD) latency = 6 and Row Precharge (RP) latency = 6 using the latest JEDEC SPD Revision 1.2 and produced
on the Raw Card "A".
1)
1)2)
Module
Organization
128M × 64
Description
Compliance Code
1GB 2R×16 PC2–6400S–666–12–A0
1GB 2R×16 PC2–5300S–555–12–A0
1GB 2R×16 PC2–4200S–444–12–A0
DRAM Components
HYB18T1G160BF
Memory
Ranks
2
2)
ECC/
Non-ECC
Non-ECC
1)
4
Ordering Information for RoHS Compliant Products
The memory array is designed with 1 Gbit Double-Data-Rate-
Two (DDR2) Synchronous DRAMs. Decoupling capacitors
are mounted on the PCB board. The DIMMs feature serial
presence detect based on a serial E
2-pin I
configuration data and are write protected; the second
128 bytes are available to the customer.
2
C protocol. The first 128 bytes are programmed with
8
# of SDRAMs # of row/bank/column
DRAM Density
1Gbit
Description
2 Ranks, Non-ECC
2 Ranks, Non-ECC
2 Ranks, Non-ECC
Small Outlined DDR2 SDRAM Modules
HYS64T128020EDL–[2.5/3S/3.7]–B
bits
13/3/10
Components on Modules
DRAM Organisation
64M x 16
SDRAM Technology
1Gbit (×16)
1Gbit (×16)
1Gbit (×16)
2
PROM device using the
Internet Data Sheet
Address Format
TABLE 2
TABLE 3
TABLE 4
Raw
Card
A