hys64t128000eu-3s-c2 Qimonda, hys64t128000eu-3s-c2 Datasheet - Page 12

• Manufacturer Part Number: hys64t128000eu-3s-c2
• Description: 240-pin Unbuffered Ddr2 Sdram Modules
• Manufacturer: Qimonda

Rev. 0.51, 2007-12
12032007-I9KE-FFWO
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tri-state,
and allows multiple devices to share as a wire-OR.
12
HYS[64/72]T[128/256]0x0EU–[25F/2.5/3/3S]–C2
Unbuffered DDR2 SDRAM Modules
Abbreviations for Buffer Type
Abbreviations for Pin Type
Advance Internet Data Sheet
TABLE 6
TABLE 7