hys64t128000eu-3s-c2 Qimonda, hys64t128000eu-3s-c2 Datasheet - Page 27

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hys64t128000eu-3s-c2

Manufacturer Part Number
hys64t128000eu-3s-c2
Description
240-pin Unbuffered Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
1) Calculated values from component data. ODT disabled.
2) The other rank is in
3) Both ranks are in the same
4) Fast: MRS(12)=0
5) Slow: MRS(12)=1
6)
Rev. 0.51, 2007-12
12032007-I9KE-FFWO
Product Type
Organization
Symbol
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DD0
DD1
DD2N
DD2P
DD2Q
DD3N
DD3P_0 (fast)
DD3P_1 (slow)
DD4R
DD4W
DD5B
DD5D
DD6
DD7
I
DD5D
and
I
DD6
values are for 0°C ≤
I
DD2P
Precharge Power-Down Current mode.
I
1GB
1 Rank (×
×64
-2.5
Max.
704
752
472
104
456
536
336
160
1216
1256
1824
128
104
2008
DD
current mode.
T
Case
8
)
≤ 85°C
1GB
1 Rank (×
×72
-2.5
Max.
792
846
531
117
513
603
378
180
1368
1413
2052
144
117
2259
I
DD1,
8
I
I
DD
)
DD4R
Specification for HYS[64/72]T[128/256]0x0EU–2.5–C2
27
and
2GB
2 Ranks (×
×64
-2.5
Max.
808
856
944
208
912
1072
672
320
1320
1360
1928
256
208
2112
I
DD7
HYS[64/72]T[128/256]0x0EU–[25F/2.5/3/3S]–C2
are defined with the outputs disabled.
8
)
2GB
2 Ranks (×
×72
-2.5
Max.
909
963
1062
234
1026
1206
756
360
1485
1530
2169
288
234
2376
Unbuffered DDR2 SDRAM Modules
Advance Internet Data Sheet
8
)
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
TABLE 19
Note
2)
2)
3)
3)
3)
3)
3)4)
3)5)
2)
2)
2)
3)6)
3)6)
2)
1)

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