hys64t32000hm-5-a Infineon Technologies Corporation, hys64t32000hm-5-a Datasheet - Page 24

• Manufacturer Part Number: hys64t32000hm-5-a
• Description: 240-pin Registered Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

Table 14
Parameter
Write recovery time for write with Auto-Precharge
Internal Write to Read command delay
Exit power down to any valid command
(other than NOP or Deselect)
Exit active power-down mode to Read command
(slow exit, lower power)
Exit precharge power-down to any valid command
(other than NOP or Deselect)
Exit Self-Refresh to non-Read command
Exit Self-Refresh to Read command
1) For details and notes see the relevant INFINEON component data sheet
2)
3) Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be
4) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a
5) The CK / CK input reference level (for timing reference to CK / CK) is the point at which CK and CK cross. The DQS / DQS,
6) Inputs are not recognized as valid until
7) The output timing reference voltage level is
8) 0
9) 85
10) x4 & x8
11) x16
Table 15
Parameter
DQ output access time from CK / CK
CAS A to CAS B command period
CK, CK high-level width
CKE minimum high and low pulse width
CK, CK low-level width
Auto-Precharge write recovery + precharge time
Minimum time clocks remain ON after CKE
asynchronously drops LOW
DQ and DM input hold time (differential data strobe)
DQ and DM input hold time (single-ended strobe)
DQ and DM input pulse width (each input)
DQS output access time from CK / CK
DQS input low (high) pulse width (write cycle)
Data Sheet
V
powered down and then restarted through the specified initialization sequence before normal operation can continue.
differential Slew Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode.
RDQS/ RDQS, input reference level is the crosspoint when in differential strobe mode
recognized as low.
DDQ
T
T
CASE
= 1.8 V ± 0.1 V;
CASE
Timing Parameter by Speed Grade - DDR2-533 (cont’d)
Timing Parameter by Speed Grade - DDR2-400
85 °C
95 °C
V
DD
= 1.8 V ± 0.1 V. See notes
V
REF
V
TT
stabilizes. During the period before
.
Symbol
WR
t
t
t
t
t
t
WTR
XARD
XARDS
XP
XSNR
XSRD
24
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
AC
CCD
CH
CKE
CL
DAL
DELAY
DH
DH1
DIPW
DQSCK
DQSL,H
(base)
(base)
HYS64T[32/64]0[0/2]0HM–[3S/3.7/5]–A
Micro-DIMM DDR2 SDRAM Modules
DDR2–533
Min.
t
7.5
2
6 – AL
2
t
200
WR
RFC
/
DDR2-400
Min.
–600
2
0.45
3
0.45
WR +
t
275
25
0.35
–500
0.35
t
CK
+10
IS
+
t
CK
t
RP
+
V
REF
t
IH
Max.
—
—
—
—
—
—
stabilizes, CKE = 0.2 x
Max.
+600
—
0.55
—
0.55
—
––
––
––
—
—
Electrical Characteristics
500
03242004-2CBE-IJ2X
Unit
ps
t
t
t
t
t
ns
ps
ps
t
ps
t
Rev. 1.1, 2005-10
CK
CK
CK
CK
CK
CK
CK
Unit
t
ns
t
t
t
ns
t
CK
CK
CK
CK
CK
Note
1)2)3)4)5)6)7)
Note
3)4)5)6)7)
V
DDQ
1)2)
is