hys64t32000hm-5-a Infineon Technologies Corporation, hys64t32000hm-5-a Datasheet - Page 26

• Manufacturer Part Number: hys64t32000hm-5-a
• Description: 240-pin Registered Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

3) Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be
4) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a
5) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross.
6) Inputs are not recognized as valid until
7) The output timing reference voltage level is
8) 0
9) 85 °C
10) x4 & x8
11) x16
Data Sheet
powered down and then restarted through the specified initialization sequence before normal operation can continue.
differential Slew Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode.
The DQS/DQS, RDQS/RDQS, input reference level is the crosspoint when in differential strobe mode
recognized as low.
T
CASE
T
CASE
85 °C
95 °C
V
REF
V
TT
stabilizes. During the period before
. See Chapter 8 for the reference load for timing measurements.
26
HYS64T[32/64]0[0/2]0HM–[3S/3.7/5]–A
Micro-DIMM DDR2 SDRAM Modules
V
REF
stabilizes, CKE = 0.2 x
Electrical Characteristics
03242004-2CBE-IJ2X
Rev. 1.1, 2005-10
V
DDQ
is