hys64t256022edl Qimonda, hys64t256022edl Datasheet - Page 3

• Manufacturer Part Number: hys64t256022edl
• Description: 200-pin Dual Small-outline-ddr2-sdram Modules
• Manufacturer: Qimonda

1
This chapter gives an overview of the 200-Pin Dual Die Small-Outline-DDR2-SDRAM Modules product family and describes
its main characteristics.
1.1
• 200-Pin PC2-6400, PC2–5300 and PC2-4200 DDR2
• 256M × 64 module organization, and 2 × 128M × 8 chip
• Standard Double-Data-Rate-Two Synchronous DRAMs
• 2GB Modules built with stacked 1Gb DDR2 SDRAMs in
• All speed grades faster than DDR2-400 comply with
• Programmable CAS Latencies (3, 4, 5 and 6), Burst
•
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
Rev. 1.0, 2006-11
11172006-DXYK-2PPW
Product Type Speed Code
Speed Grade
Max. Clock Frequency
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
SDRAM memory modules.
organization
(DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power
supply
PG-TFBGA-71 chipsize packages
DDR2-400 timing specifications.
Length (8 & 4) and Burst Type
Burst Refresh, Distributed Refresh and Self Refresh
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Overview
Features
@CL6
@CL5
@CL4
@CL3
f
f
f
f
t
t
t
t
CK6
CK5
CK4
CK3
RCD
RP
RAS
RC
–25F
PC2–6400
5–5–5
400
400
266
200
12.5
12.5
45
57.5
3
–2.5
PC2–6400
6–6–6
400
333
266
200
15
15
45
60
• Programmable self refresh rate via EMRS2 setting
• Programmable partial array refresh via EMRS2 settings
• Average Refresh Period 7.8 µs at a
• DCC enabling via EMRS2 setting
• All inputs and outputs SSTL_18 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die
• Serial Presence Detect with E
• SO-DIMM Dimensions (nominal):
• Based on Standard reference layouts Raw Card “D”
• RoHS Compliant Products
3.9µs between 85°C and 95°C.
Termination (ODT)
30 mm high, 67.6 mm wide
–3
PC2–5300
4–4–4
–
333
333
200
12
12
45
57
HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B
Small Outline DDR2 SDRAM Modules
–3S
PC2–5300
5–5–5
–
333
266
200
15
15
45
60
1)
2
PROM
Performance Table
T
Internet Data Sheet
CASE
–3.7
PC2–4200
4–4–4
–
266
266
200
15
15
45
60
lower than 85°C,
TABLE 1
Unit
—
MHz
MHz
MHz
MHz
ns
ns
ns
ns