hys64t256022edl Qimonda, hys64t256022edl Datasheet - Page 38
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hys64t256022edl
Manufacturer Part Number
hys64t256022edl
Description
200-pin Dual Small-outline-ddr2-sdram Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T256022EDL.pdf
(40 pages)
1) Multiplying “Memory Density per I/O” with “Module Data Width” and dividing by 8 for Non-ECC and 9 for ECC modules gives the overall
Rev. 1.0, 2006-11
11172006-DXYK-2PPW
Field
10
11
Field
1
2
3
4
5+6
7
8
9
10
module memory density in MBytes as listed in column “Coding”.
Description
Description
Speed Grade
Die Revision
Qimonda Component Prefix
Interface Voltage [V]
DRAM Technology
Component Density [Mbit]
Number of I/Os
Product Variations
Die Revision
Package, Lead-Free Status
Speed Grade
Values
HYB
18
T
256
512
1G
2G
40
80
16
0 .. 9
A
B
C
F
–25F
–2.5
–3
–3S
–3.7
–5
Values
–2.5F
–2.5
–3
–3S
–3.7
–5
–A
–B
38
HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B
Coding
Constant
SSTL_18
DDR2
256 Mbit
512 Mbit
1 Gbit
2 Gbit
×4
×8
×16
Look up table
First
Second
FBGA, lead-containing
FBGA, lead-free
DDR2-800 5-5-5
DDR2-800 6-6-6
DDR2-667 4-4-4
DDR2-667 5-5-5
DDR2-533 4-4-4
DDR2-400 3-3-3
Coding
PC2–6400 5–5–5
PC2–6400 6–6–6
PC2–5300 4–4–4
PC2–5300 5–5–5
PC2–4200 4–4–4
PC2–3200 3–3–3
First
Second
Small Outline DDR2 SDRAM Modules
DDR2 DRAM Nomenclature
Internet Data Sheet
TABLE 26