mt9jsf12872az Micron Semiconductor Products, mt9jsf12872az Datasheet - Page 19

• Manufacturer Part Number: mt9jsf12872az
• Description: 1gb, 2gb, 4gb X72, Ecc, Sr 240-pin Ddr3 Sdram Udimm
• Manufacturer: Micron Semiconductor Products

Table 21: Capability Register Bit Description (Continued)
Configuration Register
Table 22: Configuration Register (Address: 0x01)
Table 23: Configuration Register Bit Descriptions
PDF: 09005aef8360c8e6
jsf9c128_256_512x72az.pdf - Rev. C 9/09 EN
Critical lock
Bit
RFU
0
1
2
3
4
5
15
bit
7
15:5
Bit
4:3
Description
Event mode
0: Comparator mode
1: Interrupt mode
EVENT# polarity
0: Active LOW
1: Active HIGH
Critical event only
0: EVENT# trips on alarm or critical temperature event
1: EVENT# trips only if critical temperature is reached
Event output control
0: Event output disabled
1: Event output enabled
Event status
0: EVENT# has not been asserted by this device
1: EVENT# is being asserted due to an alarm window
or critical temperature condition
Clear event
0: No effect
1: Clears the event when the temperature sensor is in
the interrupt mode
Alarm lock bit
Description
Temperature resolution
00: 0.5°C LSB
01: 0.25°C LSB
10: 0.125°C LSB
11: 0.0625°C LSB
0: Must be set to zero
RFU
14
6
Clear event
1GB, 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 SDRAM UDIMM
RFU
13
5
Temperature Sensor with Serial Presence-Detect EEPROM
Event output
status
RFU
12
4
Bit
Bit
19
Event output
control
RFU
11
3
Notes
Event mode cannot be changed if either of the lock
bits is set.
EVENT# polarity cannot be changed if either of the
lock bits is set.
This is a read-only field in the register. The event caus-
ing the event can be determined from the read tem-
perature register.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Critical event
only
10
2
Hysteresis
Event polarity
©2008 Micron Technology, Inc. All rights reserved.
9
1
Event mode
Shutdown
mode
8
0