mt9jsf12872az Micron Semiconductor Products, mt9jsf12872az Datasheet - Page 21

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mt9jsf12872az

Manufacturer Part Number
mt9jsf12872az
Description
1gb, 2gb, 4gb X72, Ecc, Sr 240-pin Ddr3 Sdram Udimm
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 4: Hysteresis Applied to Temperature Around Trip Points
Table 24: Hysteresis Applied to Alarm Window Bits in the Temperature Register
Temperature Format
PDF: 09005aef8360c8e6
jsf9c128_256_512x72az.pdf - Rev. C 9/09 EN
Condition
Clears
Sets
Above window bit
Below window bit
Notes:
The temperature trip point registers and temperature readout register use a 2’s comple-
ment format to enable negative numbers. The least significant bit (LSB) is equal to
0.0625°C or 0.25°C, depending on which register is referenced. For example, assuming
an LSB of 0.0625°C:
• A value of 0x018C would equal 24.75°C
• A value of 0x06C0 would equal 108°C
• A value of 0x1E74 would equal –24.75°C
Temperature
1. T
2. T
3. Hyst is the value set in the hysteresis bits of the configuration register.
Gradient
Falling
Rising
T
T
Below Alarm Window Bit
H
L
H
L
1GB, 2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 SDRAM UDIMM
is the value set in the alarm temperature lower boundary trip register.
2
is the value set in the alarm temperature upper boundary trip register.
1
Temperature Sensor with Serial Presence-Detect EEPROM
Critical Temperature
T
L
- Hyst
21
T
L
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Temperature
Gradient
T
Falling
Rising
H
Above Alarm Window Bit
-
Hyst
3
©2008 Micron Technology, Inc. All rights reserved.
T
L
-
Critical Temperature
Hyst
T
H
- Hyst
T
H

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