w83c554f Winbond Electronics Corp America, w83c554f Datasheet - Page 131
w83c554f
Manufacturer Part Number
w83c554f
Description
System I/o Controller With Pci Arbiter & Ultradma/33 Ide Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83C554F.pdf
(156 pages)
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W83C554F
4.4.1
Primary/Secondary Command Registers
Function:
Type:
Bit Description:
WINBOND ELECTRONICS CORP. AMERICA
Bits [7:4]:
Bit 3:
Bits [2:1]:
Bit 0:
Read/Write
Primary/Secondary Command Registers
These registers are used to control DMA data transfers to/from the two IDE ports when multi-word DMA
disk drives are used.
These bits are hardwired to 0b.
W/R#. This bit controls the bus master transfer direction. Low is PCI memory to IDE device and
high is IDE device to PCI memory. This bit must not be changed while the bus master function
is active as defined by bit 0.
These bits are hardwired to 0b.
BMEN. Bus Master operation is active when this bit is set. The bus master operation can be
terminated by writing a 0b to this bit but is considered as an abort and can not be resumed.
Writing a 1b to this bit will also set the BMEN bit in the Device Control Register.
Register Information
129
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